MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 14
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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11.1
11.2
11.3
11.4
11.4.1
11.4.2
11.4.3
11.4.4
11.5
11.5.1
11.5.2
11.5.3
11.6
11.6.1
11.6.2
11.6.3
11.7
11.7.1
11.7.2
11.7.3
11.7.4
11.7.5
11.7.6
11.8
11.8.1
11.8.2
11.8.3
11.8.4
11.8.5
11.8.6
12.1
12.2
12.3
12.4
Freescale Semiconductor
Paragraph
Number
General Features ........................................................................................................... 11-1
Data Memory Protection Unit Features ........................................................................ 11-1
L2U Block Diagram ...................................................................................................... 11-2
Modes Of Operation ..................................................................................................... 11-3
Data Memory Protection ............................................................................................... 11-4
Reservation Support ...................................................................................................... 11-7
L-Bus Show Cycle Support .......................................................................................... 11-9
L2U Programming Model ........................................................................................... 11-12
Features ......................................................................................................................... 12-1
UIMB Block Diagram .................................................................................................. 12-2
Clock Module ............................................................................................................... 12-2
Interrupt Operation ....................................................................................................... 12-3
Normal Mode ............................................................................................................ 11-3
Reset Operation ......................................................................................................... 11-4
Peripheral Mode ........................................................................................................ 11-4
Factory Test Mode .................................................................................................... 11-4
Functional Description .............................................................................................. 11-5
Associated Registers ................................................................................................. 11-6
L-Bus Memory Access Violations ............................................................................ 11-7
Reservation Protocol ................................................................................................. 11-8
L2U Reservation Support ......................................................................................... 11-8
Reserved Location (Bus) and Possible Actions ........................................................ 11-9
Programming Show Cycles .................................................................................... 11-10
Performance Impact ................................................................................................ 11-10
Show Cycle Protocol .............................................................................................. 11-10
L-Bus Write Show Cycle Flow ............................................................................... 11-10
L-Bus Read Show Cycle Flow ................................................................................ 11-11
Show Cycle Support Guidelines ............................................................................. 11-11
U-Bus Access .......................................................................................................... 11-13
Transaction Size ...................................................................................................... 11-13
L2U Module Configuration Register (L2U_MCR) ................................................ 11-13
Region Base Address Registers (L2U_RBAx) ....................................................... 11-14
Region Attribute Registers (L2U_RAx) ................................................................. 11-15
Global Region Attribute Register (L2U_GRA) ...................................................... 11-16
U-Bus to IMB3 Bus Interface (UIMB)
L-Bus to U-Bus Interface (L2U)
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Chapter 11
Chapter 12
Title
Number
Page
xiv
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