MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 42
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure
Number
External Interrupt Relocation Table Base Address Register (EIBADR)................................ 4-25
USIU Block Diagram................................................................................................................ 5-2
System Configuration and Protection Logic............................................................................. 6-3
Circuit Paths of Reading and Writing to SGPIO ...................................................................... 6-7
MPC561/MPC563 Interrupt Structure...................................................................................... 6-9
Lower Priority Request Masking—One Bit Diagram ............................................................ 6-14
MPC561/MPC563 Interrupt Controller Block Diagram ........................................................ 6-15
Typical Interrupt Handler Routine.......................................................................................... 6-17
RTC Block Diagram ............................................................................................................... 6-20
PIT Block Diagram ................................................................................................................. 6-21
SWT State Diagram ................................................................................................................ 6-22
SWT Block Diagram .............................................................................................................. 6-23
MPC561/MPC563 Memory Map ........................................................................................... 6-24
SIU Module Configuration Register (SIUMCR).................................................................... 6-25
Internal Memory Mapping Register (IMMR)......................................................................... 6-28
External Master Control Register (EMCR) ............................................................................ 6-30
SIU Interrupt Pending Register (SIPEND) ............................................................................. 6-32
SIU Interrupt Pending Register 2 (SIPEND2) ........................................................................ 6-32
SIU Interrupt Pending Register 3 (SIPEND3) ........................................................................ 6-33
SIU Interrupt Mask Register (SIMASK) ................................................................................ 6-34
SIU Interrupt Mask Register 2 (SIMASK2) ........................................................................... 6-34
SIU Interrupt Mask Register 3 (SIMASK3) ........................................................................... 6-35
SIU Interrupt Edge Level Register (SIEL) ............................................................................. 6-35
SIU Interrupt Vector Register (SIVEC).................................................................................. 6-36
Example of SIVEC Register Usage for Interrupt Table Handling ......................................... 6-36
Interrupt In-Service Register 2 (SISR2) ................................................................................. 6-37
Interrupt In-Service Register 3 (SISR3) ................................................................................. 6-37
System Protection Control Register (SYPCR) ....................................................................... 6-38
Software Service Register (SWSR) ........................................................................................ 6-39
Transfer Error Status Register (TESR) ................................................................................... 6-39
Decrementer Register (DEC).................................................................................................. 6-40
Time Base (Reading) (TB) ..................................................................................................... 6-41
Time Base (Writing) (TB) ...................................................................................................... 6-41
Time Base Reference Register 0 (TBREF0)........................................................................... 6-41
Time Base Reference Register 1 (TBREF1)........................................................................... 6-41
Time Base Control and Status Register (TBSCR).................................................................. 6-42
Real-Time Clock Status and Control Register (RTCSC) ....................................................... 6-43
Real-Time Clock Register (RTC) ........................................................................................... 6-43
Real-Time Clock Alarm Register (RTCAL) .......................................................................... 6-44
Periodic Interrupt Status and Control Register (PISCR) ........................................................ 6-44
MPC561/MPC563 Reference Manual, Rev. 1.2
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