MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 34
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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24.14
24.14.1
24.14.1.1
24.14.1.2
24.14.1.3
24.14.1.4
24.14.2
24.14.2.1
24.14.2.2
24.14.2.3
24.14.2.4
24.14.3
24.14.4
24.15
24.15.1
24.15.2
25.1
25.1.1
25.1.2
25.1.2.1
25.1.2.2
25.1.3
25.1.3.1
25.1.3.2
25.1.3.3
25.1.3.4
25.1.4
25.2
25.2.1
25.2.2
A.1
A.2
xxxiv
Paragraph
Number
IEEE 1149.1 Test Access Port ...................................................................................... 25-1
MPC561/MPC563 Restrictions .................................................................................. 25-32
ICDU Key Features ........................................................................................................ A-1
Class-Based Compression Model Main Principles......................................................... A-1
RCPU Development Access ...................................................................................... 24-76
Power Management ................................................................................................... 24-86
RCPU Development Access Messaging ................................................................. 24-77
RCPU Development Access Operation .................................................................. 24-79
Throughput .............................................................................................................. 24-82
Development Access Timing Diagrams ................................................................. 24-82
Functional Description ............................................................................................ 24-86
Low Power Modes .................................................................................................. 24-86
Overview ................................................................................................................... 25-2
Entering JTAG Mode ................................................................................................ 25-3
Instruction Register ................................................................................................. 25-30
HI-Z ........................................................................................................................ 25-32
Non-Scan Chain Operation ..................................................................................... 25-32
BSDL Description ................................................................................................... 25-33
DSDI Message .................................................................................................... 24-77
DSDO Message .................................................................................................. 24-78
BDM Status Message ......................................................................................... 24-78
Error Message (Invalid Message) ....................................................................... 24-79
Enabling RCPU Development Access Via READI Signals ............................... 24-80
Entering Background Debug Mode (BDM) Via READI Signals ...................... 24-80
Non-Debug Mode Access of RCPU Development Access ................................ 24-80
RCPU Development Access Flow Diagram ....................................................... 24-81
TAP Controller ..................................................................................................... 25-4
Boundary Scan Register ....................................................................................... 25-4
EXTEST ............................................................................................................. 25-31
SAMPLE/PRELOAD ......................................................................................... 25-31
BYPASS ............................................................................................................. 25-31
CLAMP ............................................................................................................... 25-32
MPC562/MPC564 Compression Features
IEEE 1149.1-Compliant Interface (JTAG)
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Appendix A
Chapter 25
Title
Freescale Semiconductor
Number
Page
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