MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 53
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Freescale Semiconductor
Figure
Number
Program State Diagram......................................................................................................... 21-23
Erase State Diagram.............................................................................................................. 21-27
Censorship States and Transitions ........................................................................................ 21-33
System Block Diagram ........................................................................................................... 22-2
MPC561/MPC563 Memory Map with CALRAM Address Ranges ...................................... 22-3
Standby Power Supply Configuration for CALRAM Array .................................................. 22-4
CALRAM Array ..................................................................................................................... 22-7
CALRAM Module Overlay Map of Flash (CLPS = 0) .......................................................... 22-8
CALRAM Address Map (CLPS = 0) ..................................................................................... 22-9
CALRAM Module Overlay Map of Flash (CLPS = 1) ........................................................ 22-10
CALRAM Address Map (CLPS = 1) ................................................................................... 22-11
CALRAM Module Configuration Register (CRAMMCR).................................................. 22-13
CALRAM Region Base Address Register (CRAM_RBAx) ................................................ 22-16
CALRAM Overlay Configuration Register (CRAM_OVLCR)........................................... 22-17
CALRAM Ownership Trace Register (CRAM_OTR) ......................................................... 22-18
Watchpoint and Breakpoint Support in the CPU.................................................................... 23-9
Partially Supported Watchpoint/Breakpoint Example.......................................................... 23-13
Instruction Support General Structure .................................................................................. 23-15
Load/Store Support General Structure.................................................................................. 23-18
Functional Diagram of MPC561/MPC563 Debug Mode Support ....................................... 23-21
Debug Mode Logic ............................................................................................................... 23-23
BDM Mode Selection ........................................................................................................... 23-24
Debug Mode Reset Configuration ........................................................................................ 23-25
Asynchronous Clock Serial Communications ...................................................................... 23-32
Synchronous Self Clock Serial Communication .................................................................. 23-32
Enabling Clock Mode Following Reset................................................................................ 23-33
Download Procedure Code Example .................................................................................... 23-37
Slow Download Procedure Loop .......................................................................................... 23-38
Fast Download Procedure Loop ........................................................................................... 23-38
Comparator A–D Value Register (CMPA–CMPD).............................................................. 23-41
Exception Cause Register (ECR).......................................................................................... 23-42
Debug Enable Register (DER).............................................................................................. 23-43
Breakpoint Counter B Value and Control Register (COUNTB) .......................................... 23-46
Comparator E–F Value Registers (CMPE–CMPF) .............................................................. 23-46
Comparator G–H Value Registers (CMPG–CMPH)............................................................ 23-47
L-Bus Support Control Register 1 (LCTRL) ........................................................................ 23-47
L-Bus Support Control Register 2 (LCTRL2) ...................................................................... 23-48
I-Bus Support Control Register (ICTRL) ............................................................................. 23-51
Breakpoint Address Register (BAR) .................................................................................... 23-53
Breakpoint Counter A Value and Control Register (COUNTA)......................................... 23-45
MPC561/MPC563 Reference Manual, Rev. 1.2
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liii
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