DP83865-EB National Semiconductor, DP83865-EB Datasheet - Page 43

• Manufacturer Part Number: DP83865-EB
• Description: BOARD EVALUATION DP83865
• Manufacturer: National Semiconductor

Specifications of DP83865-EB

• Main Purpose: Interface, Ethernet
• Utilized Ic / Part: DP83865
• Lead Free Status / RoHS Status: Not applicable / Not applicable

3.0 Configuration
resolved by a random number generation. See IEEE
802.3ab Clause 40.5.1.2 for more details.
Depending on what link the partner is configured to, the
Auto-Negotiation of Master/Slave mode can be resolved to
eight possible outcomes.
3.3.5 Pause and Asymmetrical Pause Resolution
When Full Duplex operation is selected during priority reso-
lution, the Auto-Negotiation also determines the Flow Con-
trol capabilities of the two link partners. Flow control was
originally introduced to force a busy station’s Link Partner
to stop transmitting data in Full Duplex operation. Unlike
Half Duplex mode of operation where a link partner could
be forced to back off by simply generating collisions, the
Full Duplex operation needed a mechanism to slow down
transmission from a link partner in the event that the receiv-
ing station’s buffers are becoming full. A new MAC control
layer was added to handle the generation and reception of
Pause Frames. Each MAC Controller has to advertise
whether it is capable of processing Pause Frames. In addi-
tion, the MAC Controller advertises if Pause frames can be
handled in both directions, i.e. receive and transmit. If the
MAC Controller only generates Pause frames but does not
respond to Pause frames generated by a link partner, it is
called Asymmetrical Pause.
The advertisement of Pause and Asymmetrical Pause
capabilities is enabled by writing ‘1’ to bits 10 and 11 of
ANAR 0x04. The link partner’s Pause capabilities is stored
ANLPAR 0x05 bits 10 and 11. The MAC Controller has to
read from ANLPAR to determine which Pause mode to
operate. The PHY layer is not involved in Pause resolution
other than simply advertising and reporting of Pause capa-
bilities.
3.3.6 Next Page Support
The DP83865 supports the Auto-Negotiation Next Page
protocol as required by IEEE 802.3u clause 28.2.4.1.7. The
Table 36. 1000BASE-T Single/Multi-Node, AN_EN = 1
Single-node
Single-node
Single-node
Single-node
MULTI_EN
Advertise
Mult-node
Mult-node
Mult-node
Mult-node
DP83865
Table 37. Master/Slave Resolution, AN_EN = 1
0
1
Link Partner
Single-node
Single-node
Multi-node
Multi-node
Advertise
Single node, Slave priority mode
Multi-node, Master priority mode
Manual
Manual
Manual
Manual
Master
Master
Slave
Slave
(Continued)
(
by random seed
by random seed
Table 37
M/S resolved
M/S resolved
DP83865
Outcome
Forced Mode
Master
Master
Master
Slave
Slave
Slave
)
by random seed
by random seed
Link Partner
M/S resolved
M/S resolved
Outcome
Master
Master
Master
Slave
Slave
Slave
43
ANNPTR 0x07 allows for the configuration and transmis-
sion of the Next Page. Refer to clause 28 of the IEEE
802.3u standard for detailed information regarding the
Auto-Negotiation Next Page function.
3.3.7 Parallel Detection
The DP83865 supports the Parallel Detection function as
defined in the IEEE 802.3u specification. Parallel Detection
requires the 10/100 Mbps receivers to monitor the receive
signal and report link status to the Auto-Negotiation func-
tion. Auto-Negotiation uses this information to configure
the correct technology in the event that the Link Partner
does not support Auto-Negotiation, yet is transmitting link
signals that the 10BASE-T or 100BASE-X PMA recognize
as valid link signals.
If the DP83865 completes Auto-Negotiation as a result of
Parallel Detection, without Next Page operation, bits 5 and
7 of ANLPAR 0x05 will be set to reflect the mode of opera-
tion present in the Link Partner. Note that bits 4:0 of the
ANLPAR will also be set to 00001 based on a successful
parallel detection to indicate a valid 802.3 selector field.
Software may determine that the negotiation is completed
via Parallel Detection by reading ‘0’ in bit 0 of ANER 0x06
after the Auto-Negotiation Complete bit (bit 5, BMSR 0x01)
is set. If the PHY is configured for parallel detect mode and
any condition other than a good link occurs, the parallel
detect fault bit will set (bit 4, ANER 0x06).
3.3.8 Restart Auto-Negotiation
If a link is established by successful Auto-Negotiation and
then lost, the Auto-Negotiation process will resume to
determine the configuration for the link. This function
ensures that a link can be re-established if the cable
becomes disconnected and re-connected. After Auto-
Negotiation is completed, it may be restarted at any time by
writing ‘1’ to bit 9 of the BMCR 0x00.
A restart Auto-Negotiation request from any entity, such as
a management agent, will cause DP83865 to halt data
transmission or link pulse activity until the break_link_timer
expires (~1500 ms). Consequently, the Link Partner will go
into link fail mode and the resume Auto-Negotiation. The
DP83865
break_link_timer has expired by transmitting FLP (Fast
Link Pulse) bursts.
3.3.9 Enabling Auto-Negotiation via Software
If the DP83865 is initialized upon power-up with Auto-
Negotiation disabled (forced technology) and the user may
desire to restart Auto-Negotiation, this could be accom-
plished by software access. Bit 12 of BMCR 0x00 should
be cleared and then set for Auto-Negotiation operation to
take place.
3.3.10 Auto-Negotiation Complete Time
Parallel detection and Auto-Negotiation take approximately
2-3 seconds to complete. In addition, Auto-Negotiation with
next page exchange takes approximately 2-3 seconds to
complete, depending on the number of next pages
exchanged.
Refer to Clause 28 of the IEEE 802.3u standard for a full
description of the individual timers related to Auto-Negotia-
tion.
will
resume
Auto-Negotiation
www.national.com
after
the