DP83865-EB National Semiconductor, DP83865-EB Datasheet - Page 74

• Manufacturer Part Number: DP83865-EB
• Description: BOARD EVALUATION DP83865
• Manufacturer: National Semiconductor

Specifications of DP83865-EB

• Main Purpose: Interface, Ethernet
• Utilized Ic / Part: DP83865
• Lead Free Status / RoHS Status: Not applicable / Not applicable

www.national.com
6.0 Electrical Specifications
6.3 Clock Timing
6.4 1000 Mb/s Timing
6.4.1 GMII Transmit Interface Timing
T6
T7
T8
Parameter
T9
T10
T11
T12
T13
T14
Note 1: t
Note 2: t
Note 3: t
Note 4: GMII Receiver input template measured with “GMII point-to-point test circuit”, see Test Conditions Section
Note 5: Guaranteed by design. Not tested.
Parameter
TXD[7:0], TX_EN,
r
setup
hold
and t
GTX_CLK
is measured from clock level of 1.9V to data level of 1.9V for data = ‘1’; and clock level = 1.9V to.data level 0.7V for data = ‘0’.
is measured from data level of 1.9V to clock level of 0.7V for data = ‘1’; and data level = 0.7V to.clock level 0.7V for data = ‘0’.
f
CLK_IN Duty Cycle
CLK_IN t
CLK_IN frequency
(25 MHz +/-50 ppm)
are measured from V
TX_ER
GTX_CLK Duty Cycle
GTX_CLK t
Setup from valid TXD, TX_EN and TXER to
Hold from
GTX_CLK Stability
GMII to MDI latency
MDI
CLK_IN
R
/t
F
R
Description
GTX_CLK to invalid TXD, TX_EN and TXER
/t
T10
F
IL_AC(MAX)
= 0.7V to V
(Continued)
T6
Description
T11
T13
T8
IH_AC(MIN)
10% to 90%
= 1.9V.
Notes
74
GTX_CLK
T12
24.99875 25.000000 25.001250
T14
Min
40
T7
Note 1,4,5
Note 2,4
Note 3,4
Note 5
1.0 to 2.5
Notes
Typ
T9
Begin of Frame
-100
Min
2.0
0.0
40
T10
Max
T7
60
Typ Max
152
+100
60
1
Units
MHz
ns
%
Units
ppm
ns
ns
ns
ns
%