MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 107

IC DSP 16BIT 60MHZ 160-LQFP

MC56F8367VPYE

Manufacturer Part Number
MC56F8367VPYE
Description
IC DSP 16BIT 60MHZ 160-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheets

Specifications of MC56F8367VPYE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
76
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
160-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
60MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
36KB
# I/os (max)
76
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
4(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
160
Package Type
LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
76
Data Ram Size
36 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MC56F8367EVME
Minimum Operating Temperature
- 40 C
Package
160LQFP
Family Name
56F8xxx
Maximum Speed
60 MHz
Number Of Timers
4
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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5.6.23.2
This register combines with the other five to represent the pending IRQs for interrupt vector numbers 2
through 85.
5.6.24
5.6.25
5.6.26
5.6.27
5.6.28
5.6.29
5.6.30
5.6.30.1
This read-only bit reflects the state of the interrupt to the 56800E core.
5.6.30.2
These read-only bits reflect the state of the new interrupt priority level bits being presented to the 56800E
core at the time the last IRQ was taken. This field is only updated when the 56800E core jumps to a new
interrupt service routine.
Note:
Freescale Semiconductor
Preliminary
Base + $1D
RESET
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
Read
Write
0 = No interrupt is being sent to the 56800E core
1 = An interrupt is being sent to the 56800E core
00 = Required nested exception priority levels are 0, 1, 2, or 3
01 = Required nested exception priority levels are 1, 2, or 3
10 = Required nested exception priority levels are 2 or 3
11 = Required nested exception priority level is 3
Reserved
Reserved—Base + 18
Reserved
Reserved
Reserved
Reserved
ITCN Control Register (ICTL)
Nested interrupts may cause this field to be updated before the original interrupt service routine can
read it.
IRQ Pending (PENDING)—Bits 81–85
Interrupt (INT)—Bit 15
Interrupt Priority Level (IPIC)—Bits 14–13
INT
15
0
14
0
—Base + 17
—Base + 19
—Base + 1A
—Base + 1B
—Base + 1C
IPIC
13
0
Figure 5-26 ITCN Control Register (ICTL)
12 11 10
1
0
56F8367 Technical Data, Rev. 9
0
VAB
9
0
8
0
7
0
6
0
INT_DIS
5
0
4
1
1
IRQB STATE
3
1
IRQA STATE
2
1
Register Descriptions
IRQB
EDG
1
0
IRQA
EDG
0
0
107

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