MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 28

• Manufacturer Part Number: MC56F8367VPYE
• Description: IC DSP 16BIT 60MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8367VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 76
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 36KB
• # I/os (max): 76
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 4(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Data Ram Size: 36 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8367EVME
• Minimum Operating Temperature: - 40 C
• Package: 160LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Number Of Timers: 4
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

28
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
(GPIOD6)
(GPIOD7)
Signal
Name
RXD1
TXD1
TCK
TMS
TDO
TDI
No.
137
138
139
140
Pin
49
50
Ball No.
N5
D8
D7
P4
A8
B8
Schmitt
Schmitt
Schmitt
Output
Output
Output
Output
Input/
Input/
Type
Input
Input
Input
Input
56F8367 Technical Data, Rev. 9
pulled high
pulled high
pulled low
disabled,
pull-up is
internally
internally
internally
disabled,
pull-up is
output is
output is
In reset,
In reset,
enabled
enabled
enabled
During
pull-up
Reset
State
Input,
Input,
Input,
Input,
Transmit Data — SCI1 transmit data output
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pull-up resistor, clear bit 6 in the
GPIOD_PUR register.
Receive Data — SCI1 receive data input
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is SCI input.
To deactivate the internal pull-up resistor, clear bit 7 in the
GPIOD_PUR register.
Test Clock Input — This input pin provides a gated clock to
synchronize the test logic and shift serial data to the
JTAG/EOnCE port. The pin is connected internally to a pull-down
resistor.
Test Mode Select Input — This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pull-up resistor.
To deactivate the internal pull-up resistor, set the JTAG bit in the
SIM_PUDR register.
Note:
Test Data Input — This input pin provides a serial input data
stream to the JTAG/EOnCE port. It is sampled on the rising edge
of TCK and has an on-chip pull-up resistor.
To deactivate the internal pull-up resistor, set the JTAG bit in the
SIM_PUDR register.
Test Data Output — This tri-stateable output pin provides a serial
output data stream from the JTAG/EOnCE port. It is driven in the
shift-IR and shift-DR controller states, and changes on the falling
edge of TCK.
Always tie the TMS pin to V
Signal Description
DD
through a 2.2K resistor.
Freescale Semiconductor
Preliminary