MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 114

IC DSP 16BIT 60MHZ 160-LQFP

MC56F8367VPYE

Manufacturer Part Number
MC56F8367VPYE
Description
IC DSP 16BIT 60MHZ 160-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheets

Specifications of MC56F8367VPYE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
76
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
160-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
60MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
36KB
# I/os (max)
76
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
4(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
160
Package Type
LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
76
Data Ram Size
36 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MC56F8367EVME
Minimum Operating Temperature
- 40 C
Package
160LQFP
Family Name
56F8xxx
Maximum Speed
60 MHz
Number Of Timers
4
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8367VPYE
Manufacturer:
AM
Quantity:
90
Part Number:
MC56F8367VPYE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8367VPYE
Manufacturer:
FREESCALE
Quantity:
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6.5.1
6.5.1.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
114
Offset
Add.
$A
$B
$C
$D
$E
$0
$1
$2
$3
$4
$5
$6
$7
$8
$F
Base + $0
RESET
Read
Write
SIM_LSH_ID
SIM_ISALH
SIM_MSH_
SIM_PUDR
SIM_ISALL
CONTROL
SIM_SCR0
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_PCE2
SIM_GPS
SIM_PCE
Reserved
Register
CLKOSR
RSTSTS
Name
SIM Control Register (SIM_CONTROL)
SIM_
SIM_
SIM_
ID
Reserved—Bits 15–7
15
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
0
0
EMI
15
0
0
0
1
0
0
0
1
0
14
Figure 6-3 SIM Control Register (SIM_CONTROL)
0
0
= Reserved
PWMA
ADCB
14
0
0
0
1
1
0
0
1
0
13
0
0
Figure 6-2 SIM Register Map Summary
ADCA
CAN
13
0
0
0
0
0
0
1
0
12
0
0
MODE
EMI_
CAN
12
0
0
0
1
0
0
1
0
56F8367 Technical Data, Rev. 9
11
0
0
RESET
DEC1
11
0
0
0
0
0
0
1
0
10
0
0
DEC0 TMRD TMRC TMRB TMRA
IRQ
10
0
0
0
0
0
0
1
0
9
0
0
XBOOT PWMB
A23
9
0
0
0
0
0
1
0
8
0
0
A22
ISAL[21:6]
8
0
0
1
0
0
1
0
FIELD
FIELD
FIELD
FIELD
7
0
0
PWMA
A21
7
0
0
1
0
0
0
1
0
MODE
EMI_
6
0
MODE
EMI_
A20
6
0
1
0
0
0
1
0
ONCE
EBL
5
0
CLKDIS
ONCE
CTRL
EBL0
SWR
SCI1
D1
5
0
0
1
0
RST
SW
4
0
COPR EXTR
SCI0
RST
SW
D0
4
1
1
0
1
0
3
0
DISABLE
JTAG
SPI1
STOP_
Freescale Semiconductor
C3
3
0
1
1
0
DISABLE
STOP_
CLKOSEL
2
0
POR
SPI0
C2
2
1
1
0
1
0
PWM
1
DISABLE
0
ISAL[23:22]
C1
WAIT_
DISABLE
B
1
0
1
0
0
0
WAIT_
Preliminary
CAN2
PWM
C0
0
0
0
0
1
0
A
0

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