MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 108

• Manufacturer Part Number: MC56F8367VPYE
• Description: IC DSP 16BIT 60MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8367VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 76
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 36KB
• # I/os (max): 76
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 4(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Data Ram Size: 36 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8367EVME
• Minimum Operating Temperature: - 40 C
• Package: 160LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Number Of Timers: 4
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

5.6.30.3
This read-only field shows the vector number (VAB[7:1]) used at the time the last IRQ was taken. This
field is only updated when the 56800E core jumps to a new interrupt service routine.
Note:
5.6.30.4
This bit allows all interrupts to be disabled.
5.6.30.5
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
5.6.30.6
This read-only bit reflects the state of the external IRQB pin.
5.6.30.7
This read-only bit reflects the state of the external IRQA pin.
5.6.30.8
This bit controls whether the external IRQB interrupt is edge- or level-sensitive. During Stop and Wait
modes, it is automatically level-sensitive.
5.6.30.9
This bit controls whether the external IRQA interrupt is edge- or level-sensitive. During Stop and Wait
modes, it is automatically level-sensitive.
5.6.31
5.6.32
Note: This register is NOT available in the 56F8167 device.
108
•
•
•
•
•
•
Base + $1F
RESET
0 = Normal operation (default)
1 = All interrupts disabled
0 = IRQB interrupt is a low-level sensitive (default)
1 = IRQB interrupt is falling-edge sensitive
0 = IRQA interrupt is a low-level sensitive (default)
1 = IRQA interrupt is falling-edge sensitive
Read
Write
Nested interrupts may cause this field to be updated before the original interrupt service routine can
read it.
Reserved
Interrupt Priority Register 10 (IPR10)
Vector Number - Vector Address Bus (VAB)—Bits 12–6
Interrupt Disable (INT_DIS)—Bit 5
Reserved—Bit 4
IRQB State Pin (IRQB STATE)—Bit 3
IRQA State Pin (IRQA STATE)—Bit 2
IRQB Edge Pin (IRQB Edg)—Bit 1
IRQA Edge Pin (IRQA Edg)—Bit 0
15
0
0
14
0
0
—Base + $1E
13
0
0
12 11 10
0
1
0
0
56F8367 Technical Data, Rev. 9
0
0
9
0
0
8
0
0
MSGBUF IPL
FLEXCAN2_
7
0
6
0
FLEXCAN2_
5
0
WKUP IPL
4
0
FLEXCAN2_
3
0
ERR IPL
Freescale Semiconductor
2
0
FLEXCAN2_
1
0
BOFF IPL
Preliminary
0
0