MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 159

• Manufacturer Part Number: MC56F8367VPYE
• Description: IC DSP 16BIT 60MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8367VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 76
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 36KB
• # I/os (max): 76
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 4(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Data Ram Size: 36 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8367EVME
• Minimum Operating Temperature: - 40 C
• Package: 160LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Number Of Timers: 4
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

10.14 Controller Area Network (CAN) Timing
Note: CAN is not available in the 56F8167 device.
10.15 JTAG Timing
Freescale Semiconductor
Preliminary
1. TCK frequency of operation must be less than 1/8 the processor rate.
2. T = processor clock period (nominally 1/60MHz)
TCK frequency of operation using EOnCE
TCK frequency of operation not using EOnCE
TCK clock pulse width
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
1. Parameters listed are guaranteed by design
Baud Rate
Bus Wake Up detection
CAN receive
CAN_RX
data pin
(Input)
Characteristic
Characteristic
Figure 10-19 Bus Wakeup Detection
T
1
Symbol
Table 10-22 CAN Timing
BR
Table 10-23 JTAG Timing
WAKEUP
56F8367 Technical Data, Rev. 9
1
CAN
Symbol
t
TRST
t
f
f
t
t
t
t
PW
OP
OP
DS
DH
DV
TS
T
WAKEUP
Min
—
5
Min
2T
DC
DC
50
—
—
5
5
2
Max
SYS_CLK/8
SYS_CLK/4
1
—
1
Max
30
30
—
—
—
—
Controller Area Network (CAN) Timing
Mbps
Unit
μs
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
See Figure
See Figure
10-19
—
10-20
10-20
10-20
10-21
10-21
10-21
10-21
10-22
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