MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 122

• Manufacturer Part Number: MC56F8367VPYE
• Description: IC DSP 16BIT 60MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8367VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 76
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 36KB
• # I/os (max): 76
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 4(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Data Ram Size: 36 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8367EVME
• Minimum Operating Temperature: - 40 C
• Package: 160LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Number Of Timers: 4
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

6.5.8.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
122
1. This applies to the two pins that serve as EMI CSn / CAN2 / GPIOD functions. A separate set of control bits is used for
GPIO Input
GPIO Output
EMI I/O
CAN2
each pin.
Base + $B
RESET
Read
Write
Pin Function
Figure 6-11 Overall Control of GPIOD Pads Using SIM_GPS Control
Reserved—Bits 15–6
15
0
0
Table 6-3 Control of GPIOD Pads Using SIM_GPS Control
Figure 6-12 GPIO Peripheral Select Register (SIM_GPS)
14
0
0
CAN2 Controlled
EMI Controlled
13
0
0
12
0
0
SIM_ GPS Register
0
0
1
1
11
0
0
GPIO Controlled
Control Registers
56F8367 Technical Data, Rev. 9
10
0
0
—
—
0
1
9
0
1
0
0
GPIOD_PER Register
8
0
0
—
—
0
1
7
0
0
0
1
6
0
0
EMI CSn pins are always outputs
CAN2_TX is always an output
CAN2_RX is always an input
I/O Pad Control
D1
5
0
D0
4
0
C3
3
0
Comments
Freescale Semiconductor
C2
2
0
1
C1
1
0
Preliminary
C0
0
0