EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 82

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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3
3-12
MaverickCrunch Co-Processor
EP93xx User’s Guide
SAT[1:0]:
FCC[1:0]:
V:
FWDEN:
Invalid:
Denorm:
RM[1:0]:
IXE:
Copyright 2007 Cirrus Logic
Accumulator saturation mode select. These bits are set to
select the saturation mode or to disable saturation for
accumulator operations:
0X = Saturation disabled for accumulator operations
10 = Accumulator saturation enabled, bit formats 1.63 and
1.31
11 = Accumulator saturation enabled, bit format 2.62
FCC flags out of comparator:
00 = Operand A equals operand B
01 = Operand A less than operand B
10 = Operand A greater than operand B
11 = Operands are unordered (at least one is NaN)
Overflow Flag. Indicates the overflow status of the
previous integer operation:
0 = No overflow
1 = Overflow
Forwarding Enable. This bit determines whether data path
writeback results are forwarded to the data path operand
fetch stage and to the STC/MRC execute stage. When
pipeline interlocks occur due to dependencies of data
path, STC, and MRC instruction source operands on data
path results, setting this bit will improve instruction
throughput:
0 = Forwarding not enabled
1 = Forwarding enabled
0 = No invalid operations detected
1 = An invalid operation was performed
0 = No denormalized numbers have been supplied as
instruction operands
1 = A denormalized number has been supplied as an
instruction operand
Rounding Mode. Selects IEEE 754 rounding mode:
0 0 = Round to nearest
0 1 = Round toward 0
1 0 = Round to
1 1 = Round to
Inexact Trap Enable. Enables/disables software trapping
for IEEE 754 inexact exceptions:
0 = Disable software trapping for inexact exceptions
1 = Enable software trapping for inexact exceptions
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DS785UM1

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