R5F363AENFA#U0 Renesas Electronics America, R5F363AENFA#U0 Datasheet - Page 287

• Manufacturer Part Number: R5F363AENFA#U0
• Description: MCU 4KB FLASH 256/16K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C/60/63r

Specifications of R5F363AENFA#U0

• Core Processor: M16C/60
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, SIO, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/63 Group
REJ09B0510-0100 Rev.1.00 Sep 15, 2009
Page 249 of 836
Table 16.5
Table 16.6
X indicates 0 or 1. – indicates no setting.
X indicates 0 or 1. – indicates no setting.
DSEL4 to DSEL0 DMS = 0 (Basic Source of Request) DMS = 1 (Extended Source of Request)
DSEL4 to DSEL0 DMS = 0 (Basic Source of Request) DMS = 1 (Extended Source of Request)
1 1 X X X b
1 1 X X X b
0 0 0 0 0 b
0 0 0 0 1 b
0 0 0 1 0 b
0 0 0 1 1 b
0 0 1 0 0 b
0 0 1 0 1 b
0 0 1 1 0 b
0 0 1 1 1 b
0 1 0 0 0 b
0 1 0 0 1 b
0 1 0 1 0 b
0 1 0 1 1 b
0 1 1 0 0 b
0 1 1 0 1 b
0 1 1 1 0 b
0 1 1 1 1 b
1 0 0 0 0 b
1 0 0 0 1 b
1 0 0 1 0 b
1 0 0 1 1 b
1 0 1 0 0 b
1 0 1 0 1 b
1 0 1 1 0 b
1 0 1 1 1 b
0 0 0 0 0 b
0 0 0 0 1 b
0 0 0 1 0 b
0 0 0 1 1 b
0 0 1 0 0 b
0 0 1 0 1 b
0 0 1 1 0 b
0 0 1 1 1 b
0 1 0 0 0 b
0 1 0 0 1 b
0 1 0 1 0 b
0 1 0 1 1 b
0 1 1 0 0 b
0 1 1 0 1 b
0 1 1 1 0 b
0 1 1 1 1 b
1 0 0 0 0 b
1 0 0 0 1 b
1 0 0 1 0 b
1 0 0 1 1 b
1 0 1 0 0 b
1 0 1 0 1 b
1 0 1 1 0 b
1 0 1 1 1 b
Source of DMA Request (DMA2)
Source of DMA Request (DMA3)
Falling edge of INT2 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 transmission
UART0 reception
UART2 transmission
UART2 reception
A/D conversion
UART1 transmission
UART1 reception
UART5 transmission
UART5 reception
UART6 transmission
UART6 reception
UART7 transmission
UART7 reception
–
–
Falling edge of INT3 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 transmission
UART0 reception/ACK0
UART2 transmission
UART2 reception/ACK2
A/D conversion
UART1 reception/ACK1
UART1 transmission
UART5 transmission
UART5 reception/ACK5
UART6 transmission
UART6 reception/ACK6
UART7 transmission
UART7 reception/ACK7
–
–
Falling edge of INT6 pin
Falling edge of INT7 pin
Both edges of INT2 pin
Both edges of INT6 pin
Both edges of INT3 pin
Both edges of INT7 pin
Timer B3
Timer B4
Timer B5
SI/O3
SI/O4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
16. DMAC