R5F363AENFA#U0 Renesas Electronics America, R5F363AENFA#U0 Datasheet - Page 865

• Manufacturer Part Number: R5F363AENFA#U0
• Description: MCU 4KB FLASH 256/16K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C/60/63r

Specifications of R5F363AENFA#U0

• Core Processor: M16C/60
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, SIO, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/63 Group
REJ09B0510-0100 Rev.1.00 Sep 15, 2009
Page 827 of 836
32.25.6 State When Forcibly Terminated
32.25.7 A/D Open-Circuit Detection Assist Function
32.25.8 Detecting Completion of A/D Conversion
Figure 32.10 ADST Bit Operation
32.25.9 φAD
If A/D conversion in progress is halted by setting the ADST bit in the ADCON0 register to 0, the
conversion result is undefined. In addition, the non-converted ADi register may also become undefined.
Do not use the ADi register when setting the ADST bit to 0 by a program during A/D conversion.
The conversion result in open-circuit depends on the external circuit. Use this function only after careful
evaluation of the system. When A/D conversion starts after changing the AINRST register, follow these
procedures:
In one-shot mode and single sweep mode, use the IR bit in the ADIC register to detect completion of
A/D conversion. When not using an interrupt, set the IR bit to 0 by a program after the detection.
When 1 is written to the ADST bit in the ADCON0 register, the ADST bit becomes 1 (A/D conversion
started) after start processing time elapses. (See Table 27.7 “Cycles of A/D Conversion Item”.) When
reading the ADST bit shortly after writing 1, 0 (A/D conversion stop) may be read.
Divide fAD so φ AD conforms the standard frequency.
In particular, consider the maximum and minimum values of fOCO40M when the CKS3 bit in the
ADCON2 register is 1 (fOCO40M is fAD).
ADST bit in the
ADCON0 register
(1) Change bits AINRST1 to AINRST0 in the AINRST register.
(2) Wait for one cycle of φ AD.
(3) Set the ADST bit in the ADCON0 register to 1 (A/D conversion started).
IR bit in the ADIC
register
Write 1 to the ADST bit by a program.
processing time
Start
A/D conversion
Set to 0 by acceptance of an interrupt
request or by a program.
32. Usage Notes