MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 326

IC MPU 32BIT 66MHZ 196-MAPBGA

MCF5272CVF66

Manufacturer Part Number
MCF5272CVF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5272CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5272CVF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5272CVF66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MCF5272CVF66 K75N
Manufacturer:
ST
Quantity:
18
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Physical Layer Interface Controller (PLIC)
13.5.18 GCI C/I Channel Transmit Status Register (PGCITSR)
All bits in this register are read only and are cleared on hardware or software reset.
The PGCITSR register is an 8-bit register containing the C/I channel status bits for each of the four
transmit ports on the MCF5272.
13-30
Bits
7–4
3
2
1
0
Name
ACK3
ACK2
ACK1
ACK0
Reset
Field
Addr
Figure 13-30. GCI C/I Channel Transmit Status Register (PGCITSR)
R/W
MCF5272 ColdFire
Reserved, should be cleared.
Acknowledge, port 3.
0 Default reset value.
1 Set by the C/I channel controller to indicate that the previous C/I data has been transmitted in
Acknowledge, port 2. See ACK3.
Acknowledge, port 1. See ACK3.
Acknowledge, port 0. See ACK3.
two successive C/I words. The ACK bit is automatically cleared by the CPU when the PGCITSR
register has been read.
7
Table 13-13. PGCITSR Field Descriptions
®
Integrated Microprocessor User’s Manual, Rev. 3
MBAR + 0x37F
0000_0000
Read Only
4
ACK3
3
Description
ACK2
2
ACK1
1
ACK0
0
Freescale Semiconductor

Related parts for MCF5272CVF66