MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 427

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
BGA
Map
M10
M11
M12
M13
M14
N10
Pin
M4
M5
M6
M7
M8
M9
N1
N2
N3
N4
N5
N6
N7
N8
N9
PWM_OUT0
QSPI_Dout/
QSPI_CS0/
USB_WOR
E_RxCLK
0 (Reset)
BYPASS
E_MDIO
E_RxDV
E_TxER
BUSW0
E_TxD0
DOUT1
CLKIN
WSEL
INT1/
PB13
PB12
RSTI
DIN1
INT3
PB7
PB9
CS4
PB8
Table 19-2. Signal Name and Description by Pin Number (Sheet 7 of 8)
MCF5272 ColdFire
Pin Functions
E_RxD1
E_RxD2
E_TxD2
E_TxD3
TOUT0
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1
®
Integrated Microprocessor User’s Manual, Rev. 3
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2
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3
QSPI_CS0 / BUSW0
QSPI_Dout / WSEL
INT1/ USB_WOR
PB13/E_RxD1
PB12/E_RxD2
PB9/E_TxD2
PB8/E_TxD3
PWM_OUT0
PB7/TOUT0
E_RxCLK
BYPASS
E_RxDV
E_TxER
E_MDIO
E_TxD0
DOUT1
CLKIN
Name
RSTI
DIN1
INT3
CS4
Interrupt input 1/USB
wake-on-ring
QSPI peripheral chip
select 0/CS0 bus width bit
0
output compare
Ethernet Rx data valid
Port B bit 9/Tx data bit 2
(100 Base-T Ethernet
only)
Port B bit 13/Rx data bit 1
(100 Base-T Ethernet
only)
Transmit error (100
base-T Ethernet only)
Chip select 4
Device reset
Bypass internal test
mode
CPU external clock input
PLIC ports 1, 2, 3 data
output
PLIC ports 1, 2, 3 data
input
Interrupt input 3
width selection
PWM output compare 0
Ethernet Tx data
Ethernet Rx clock
Port B bit 8/Tx data bit 3
(100 Base-T Ethernet
only)
Port B bit 12/Rx data bit 2
(100 Base-T Ethernet
only)
Management channel
serial data (100 base-T
only)
Port B bit 7/Timer 0
QSPI data output/Bus
Description
Signal Descriptions
19-17
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I