MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 518

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

List of Memory Maps
A-2
CPU SPACE
ADDRESS
0x002C
0x0000
0x0004
0x0006
0x0008
0x000E
0x0010
0x0020
0x0024
0x0028
0x0030
0x0034
0x0038
0x003F
MBAR
Offset
MBAR
Offset
0x0C00
0x0C04
0x0C0F
0x080E
0x080F
0x0002
0x0004
0x0005
0x008x
0x008x
0x0801
(CACR)
D7:D0
CCR
PC
RAMBAR
MBAR
(ACR0)
(ACR1)
A7:A0
(VBR)
ROMBAR
NAME
MBAR must only be written using the MOVEC instruction. Writing to
address MBAR+0x0000 causes unpredictable device operation.
Table A-3. On-Chip Peripherals and Configuration Registers Memory Map
System Configuration Register (SCR)
[31:24]
[31:24]
MCF5272 ColdFire
Size
32
32
32
32
32
32
32
32
32
32
8
Table A-4. Interrupt Control Register Memory Map
Cache Control Register
Cache Access Control Register 0
Cache Access Control Register 1
Address registers A7:A0
Data registers D7:D0
Vector Base Register
Condition Code Register (Debug only)
Program Counter (Debug only)
ROM Base Address Register
SRAM Base Address Register
Module Base Address Register
Reserved
Reserved
Table A-2. CPU Space Registers Memory Map
SYSTEM CONFIGURATION REGISTERS
Module Base Address Register, Read Only (MBAR)
Programmable Interrupt Transition Register (PITR)
Programmable Interrupt Wakeup Register (PIWR)
®
Integrated Microprocessor User’s Manual, Rev. 3
Reserved
[23:16]
Power Management Register (PMR)
[23:16]
Device Identification Register (DIR)
Interrupt Control Register 1 (ICR1)
Interrupt Control Register 2 (ICR2)
Interrupt Control Register 3 (ICR3)
Interrupt Control Register 4 (ICR4)
Interrupt Source Register (ISR)
NOTE
Activate Low Power Register (ALPR)
[15:8]
[15:8]
System Protection Register (SPR)
MOVE
MOVE to/from CCR
MOVEC
MOVEC
MOVEC
MOVEC
MOVE
MOVEC
MOVEC
MOVEC
Program Access
Reserved
Programmable Interrupt
Vector Register (PIVR)
Freescale Semiconductor
RCREG, WCREG
RAREG, WAREG
RDREG, WDREG
RCREG, WCREG
RCREG, WCREG
RCREG, WCREG
RCREG, WCREG
RCREG, WCREG
RCREG, WCREG
RCREG, WCREG
Debug Access
[7:0]
[7:0]