PIC16F1824-I/P Microchip Technology, PIC16F1824-I/P Datasheet - Page 155

IC PIC MCU 8BIT 14KB FLSH 14PDIP

PIC16F1824-I/P

Manufacturer Part Number
PIC16F1824-I/P
Description
IC PIC MCU 8BIT 14KB FLSH 14PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1824-I/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
16.2.7
The following registers are used to control the
operation of the ADC.
REGISTER 16-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6-2
bit 1
bit 0
Note 1:
U-0
2:
3:
See
See
PIC16F/LF1828 only.
ADC REGISTER DEFINITIONS
Unimplemented: Read as ‘0’
CHS<4:0>: Analog Channel Select bits
00000 = AN0
00001 = AN1
00010 = AN2
00011 = AN3
00100 = AN4
00101 = AN5
00110 = AN6
00111 = AN7
01000 = AN8
01001 = AN9
01010 = AN10
01011 = AN11
01100 = Reserved. No channel connected
11101 = Reserved. No channel connected
11110 = DAC output
11111 = FVR (Fixed Voltage Reference) Buffer 1 Output
GO/DONE: A/D Conversion Status bit
1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
0 = A/D conversion completed/not in progress
ADON: ADC Enable bit
1 = ADC is enabled
0 = ADC is disabled and consumes no operating current
Section 17.0 “Digital-to-Analog Converter (DAC)
Section 14.0 “Fixed Voltage Reference (FVR)”
R/W-0/0
This bit is automatically cleared by hardware when the A/D conversion has completed.
ADCON0: A/D CONTROL REGISTER 0
(2)
(2)
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
(2)
(2)
R/W-0/0
(1)
CHS<4:0>
R/W-0/0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
for more information.
PIC16(L)F1824/1828
Module”for more information.
(2)
R/W-0/0
GO/DONE
R/W-0/0
DS41419B-page 155
R/W-0/0
ADON
bit 0

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