PIC14000-04I/SS Microchip Technology, PIC14000-04I/SS Datasheet - Page 80

• Manufacturer Part Number: PIC14000-04I/SS
• Description: IC, 8BIT MCU, PIC14, 4MHZ, SSOP-28
• Manufacturer: Microchip Technology

Specifications of PIC14000-04I/SS

• Controller Family/series: PIC14
• No. Of I/o's: 22
• Ram Memory Size: 192Byte
• Cpu Speed: 4MHz
• No. Of Timers: 2
• Interface: I2C
• Digital Ic Case Style: SSOP
• Core Size: 8 Bit
• Program Memory Size: 4096 X 14
• Embedded Interface Type: I2C
• Rohs Compliant: Yes
• Processor Series: PIC14000
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: EPROM
• Data Ram Size: 192 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC14000
10.5.5
On power-up the time-out sequence is as follows: First
the PWRT time-out is invoked after POR has expired.
The OST is activated only in HS (crystal oscillator)
mode. The total time-out will vary based on the oscilla-
tor configuration and PWRTE status. For example, in
IN mode, with PWRTE unprogrammed (PWRT dis-
abled), there will be no time-out delay at all.
Figure 13-4 depicts the power-on reset time-out
sequences.
Table 10-4 shows the reset conditions for some special
registers, while Table 10-5 shows the reset conditions
for all registers.
TABLE 10-4:
Legend: u = unchanged
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
DS40122B-page 80
Power-on Reset
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset during normal operation
WDT during SLEEP
Interrupt wake-up from SLEEP
TIMEOUT SEQUENCE
x = unknown
- = unimplemented, read as ‘0’
(0004h).
Condition
RESET CONDITION FOR SPECIAL REGISTERS
Addr: 02h
PC + 1
PC + 1
000h
000h
000h
000h
PCL
Preliminary
(1)
FIGURE 10-8: EXTERNAL POWER-ON
1.
2.
3.
External power-on reset circuit is required
only if V
diode D helps discharge the capacitor
quickly when V
R < 40 K
that voltage drop across R does not exceed
0.2V (max leakage current spec on MCLR
pin is 5
degrade VIH level on MCLR pin.
R1 = 100
flowing into MCLR from external capacitor C
in the event of MCLR pin breakdown due to
ESD or EOS.
0001 1xxx
0001 1uuu
0001 0uuu
0000 1uuu
uuu0 0uuu
uuu1 0uuu
V
Addr: 03h
STATUS
DD
D
DD
RESET CIRCUIT (FOR SLOW
V
V
power-up slope is too slow. The
A). A larger voltage drop will
DD
DD
is recommended to make sure
to 1 K
R
C
DD
POWER-UP)
R1
powers down.
1996 Microchip Technology Inc.
will limit any current
MCLR
PIC14000
0--- --0x
u--- --ux
u--- --ux
u--- --ux
u--- --ux
u--- --ux
Addr: 8Eh
PCON