DSPIC30F6010A-20E/PT Microchip Technology, DSPIC30F6010A-20E/PT Datasheet - Page 144

• Manufacturer Part Number: DSPIC30F6010A-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010A-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERXLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC30F6010A/6015
20.8
The analog input model of the 10-bit A/D converter is
shown in Figure 20-3. The total sampling time for the
A/D is a function of the internal amplifier settling time,
device V
For the A/D converter to meet its specified accuracy, the
charge holding capacitor (C
fully charge to the voltage level on the analog input pin.
The analog output source impedance (R
interconnect impedance (R
switch (R
time required to charge the capacitor C
combined impedance must therefore be small enough
to fully charge the holding capacitor within the chosen
sample time. To minimize the effects of pin leakage
currents on the accuracy of the A/D converter, the
maximum recommended source impedance, R
for conversion rates up to 500 ksps and a maximum of
500Ω for conversion rates up to 1 Msps. After the analog
input channel is selected (changed), this sampling
function must be completed prior to starting the
conversion. The internal holding capacitor will be in a
discharged state prior to each sample operation.
FIGURE 20-3:
DS70150D-page 144
DD
A/D Acquisition Requirements
SS
) impedance combine to directly affect the
and the holding capacitor charge time.
Note: C
Legend: C
VA
PIN
Rs
A/D CONVERTER ANALOG INPUT MODEL
value depends on device package and is not tested. Effect of C
V
I leakage
R
R
C
ANx
IC
PIN
T
IC
SS
HOLD
C
HOLD
), and the internal sampling
PIN
) must be allowed to
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
various junctions
V
HOLD
DD
V
S
V
S
T
, is 5 kΩ
T
), the
= 0.6V
= 0.6V
. The
R
I leakage
± 500 nA
IC
≤ 250Ω
The user must allow at least 1 T
time, T
sample to be acquired. This sample time may be
controlled manually in software by setting/clearing the
SAMP bit, or it may be automatically controlled by the
A/D converter. In an automatic configuration, the user
must allow enough time between conversion triggers
so that the minimum sample time can be satisfied.
Refer to Section 24.0 “Electrical Characteristics” for
T
AD
and sample time requirements.
SAMP
Sampling
Switch
R
SS
, between conversions to allow each
PIN
R
negligible if Rs ≤ 5 kΩ.
SS
V
SS
C
= DAC capacitance
= 4.4 pF
≤ 3 kΩ
HOLD
© 2008 Microchip Technology Inc.
AD
period of sampling