DSPIC30F6010A-20E/PT Microchip Technology, DSPIC30F6010A-20E/PT Datasheet - Page 223

• Manufacturer Part Number: DSPIC30F6010A-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010A-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERXLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INDEX
A
A/D
AC Characteristics ........................................................... 186
Address Generator Units ................................................... 35
Alternate Vector Table ....................................................... 45
Alternate 16-bit Timer/Counter ........................................... 91
Assembler
Automatic Clock Stretch ................................................... 112
B
Barrel Shifter ...................................................................... 22
Bit-Reversed Addressing ................................................... 38
Block Diagrams
© 2008 Microchip Technology Inc.
Aborting a Conversion ............................................. 140
Acquisition Requirements ........................................ 144
ADCHS .................................................................... 137
ADCON1 .................................................................. 137
ADCON2 .................................................................. 137
ADCON3 .................................................................. 137
ADCSSL ................................................................... 137
ADPCFG .................................................................. 137
Configuring Analog Port Pins ................................... 146
Connection Considerations ...................................... 146
Conversion Operation .............................................. 139
Conversion Rate Parameters ................................... 141
Conversion Speeds .................................................. 141
Effects of a Reset ..................................................... 145
Operation During CPU Idle Mode ............................ 145
Operation During CPU Sleep Mode ......................... 145
Output Formats ........................................................ 145
Power-Down Modes ................................................. 145
Programming the Start of Conversion Trigger ......... 140
Register Map ............................................................ 147
Result Buffer ............................................................ 139
Selecting the Conversion Clock ............................... 140
Selecting the Conversion Sequence ........................ 139
Voltage Reference Schematic ................................. 142
1 Msps Configuration Guideline ............................... 142
10-bit High-Speed Analog-to-Digital
Converter Module .................................................... 137
600 ksps Configuration Guideline ............................ 143
750 ksps Configuration Guideline ............................ 143
Internal FRC Jitter, Accuracy and Drift .................... 190
Internal LPRC Accuracy ........................................... 190
Load Conditions ....................................................... 186
Temperature and Voltage Specifications ................. 186
MPASM Assembler .................................................. 174
During 10-bit Addressing (STREN = 1) .................... 112
During 7-bit Addressing (STREN = 1) ...................... 112
Receive Mode .......................................................... 112
Transmit Mode ......................................................... 112
Example ..................................................................... 38
Implementation .......................................................... 38
Modifier Values (table) ............................................... 39
Sequence Table (16-Entry) ........................................ 39
CAN Buffers and Protocol Engine ............................ 126
Dedicated Port Structure ............................................ 59
DSP Engine ............................................................... 19
dsPIC30F6010A ......................................................... 10
dsPIC30F6015 ........................................................... 11
External Power-on Reset Circuit .............................. 158
Input Capture Mode ................................................... 81
I
2
C ............................................................................ 110
dsPIC30F6010A/6015
BOR. See Brown-out Reset.
Brown-out Reset (BOR) ................................................... 149
C
C Compilers
CAN
CAN Module .................................................................... 125
Center-Aligned PWM ......................................................... 99
Code Examples
Oscillator System ..................................................... 151
Output Compare Mode .............................................. 85
PWM Module ............................................................. 96
Quadrature Encoder Interface ................................... 89
Reset System .......................................................... 155
Shared Port Structure ................................................ 60
SPI ........................................................................... 106
SPI Master/Slave Connection .................................. 106
UART Receiver ........................................................ 118
UART Transmitter .................................................... 117
10-bit High-Speed A/D Functional ........................... 138
16-bit Timer1 Module (Type A Timer) ........................ 66
16-bit Timer2 (Type B Timer) for dsPIC30F6010A .... 72
16-bit Timer2 (Type B Timer) for dsPIC30F6015 ...... 72
16-bit Timer3 (Type C Timer) .................................... 73
16-bit Timer4 (Type B Timer) .................................... 78
16-bit Timer5 (Type C Timer) .................................... 78
32-bit Timer2/3 for dsPIC30F6010A .......................... 70
32-bit Timer2/3 for dsPIC30F6015 ............................ 71
32-bit Timer4/5 .......................................................... 77
MPLAB C18 ............................................................. 174
MPLAB C30 ............................................................. 174
Baud Rate Setting ................................................... 130
CAN1 Register Map for dsPIC30F6010A/6015 ....... 132
CAN2 Register Map for dsPIC30F6010A ................ 134
Frame Types ........................................................... 125
Message Reception ................................................. 128
Message Transmission ............................................ 129
Operation Modes ..................................................... 127
Overview .................................................................. 125
Data EEPROM Block Erase ...................................... 56
Bit Timing ......................................................... 130
Phase Segments ............................................. 131
Prescaler ......................................................... 131
Propagation Segment ...................................... 131
Sample Point ................................................... 131
Synchronization ............................................... 131
Acceptance Filter Masks ................................. 128
Acceptance Filters ........................................... 128
Receive Buffers ............................................... 128
Receive Errors ................................................. 128
Receive Interrupts ........................................... 128
Receive Overrun .............................................. 128
Aborting ........................................................... 129
Errors ............................................................... 129
Priority ............................................................. 129
Sequence ........................................................ 129
Transmit Buffers .............................................. 129
Transmit Interrupts .......................................... 130
Disable ............................................................ 127
Error Recognition ............................................. 127
Initialization ...................................................... 127
Listen-Only ...................................................... 127
Loopback ......................................................... 127
Normal ............................................................. 127
DS70150D-page 223