DSPIC30F6010A-20E/PT Microchip Technology, DSPIC30F6010A-20E/PT Datasheet - Page 226

• Manufacturer Part Number: DSPIC30F6010A-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010A-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERXLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC30F6010A/6015
PWM Output and Polarity Control .................................... 102
PWM Output Override ...................................................... 101
PWM Period ....................................................................... 98
PWM Special Event Trigger ............................................. 103
PWM Time Base ................................................................ 97
PWM Update Lockout ...................................................... 103
Q
QEI
Quadrature Encoder Interface (QEI) Module ..................... 89
R
Reader Response ............................................................ 229
Reset ........................................................................ 149, 155
Reset Sequence ................................................................. 43
Resets
Revision History ............................................................... 221
RTSP Control Registers ..................................................... 50
S
Simple Capture Event Mode
Simple Output Compare Match Mode ................................ 86
Simple PWM Mode ............................................................ 86
Single-Pulse PWM Operation .......................................... 101
Software Controlled Clock Stretching (STREN = 1) ......... 112
Software Simulator (MPLAB SIM) .................................... 174
Software Stack Pointer, Frame Pointer .............................. 16
SPI Module ....................................................................... 105
DS70150D-page 226
Output Pin Control ................................................... 102
Complementary Output Mode .................................. 101
Synchronization ....................................................... 101
Postscaler ................................................................ 103
Continuous Up/Down Counting Modes ...................... 97
Double Update Mode ................................................. 98
Free-Running Mode ................................................... 97
Postscaler .................................................................. 98
Prescaler .................................................................... 98
Single-Shot Mode ...................................................... 97
16-bit Up/Down Position Counter Mode ..................... 90
Interrupts .................................................................... 92
Logic .......................................................................... 90
Operation During CPU Idle Mode .............................. 91
Operation During CPU Sleep Mode ........................... 91
Register Map .............................................................. 93
Timer Operation During CPU Idle Mode .................... 92
Timer Operation During CPU Sleep Mode ................. 91
Reset Sources ........................................................... 43
Brown-out Rest (BOR), Programmable ................... 157
POR with Long Crystal Start-up Time ...................... 157
POR, Operating without FSCM and PWRT ............. 157
Power-on Reset (POR) ............................................ 156
NVMADR ................................................................... 50
NVMADRU ................................................................. 50
NVMCON ................................................................... 50
NVMKEY .................................................................... 50
Capture Buffer Operation ........................................... 82
Capture Prescaler ...................................................... 81
Hall Sensor Mode ...................................................... 82
Timer2 and Timer3 Selection Mode ........................... 82
Input Pin Fault Protection ........................................... 86
Period ......................................................................... 87
CALL Stack Frame ..................................................... 31
Framed SPI Support ................................................ 107
Operating Function Description ............................... 105
Count Direction Status ....................................... 90
Error Checking ................................................... 90
STATUS Register .............................................................. 16
Symbols Used in Opcode Descriptions ........................... 166
System Integration ........................................................... 149
T
Timer1 Module ................................................................... 65
Timer2 and Timer3 Selection Mode ................................... 86
Timer2/3 Module ................................................................ 69
Timer4/5 Module ................................................................ 77
Timing Diagrams
Operation During CPU Idle Mode ............................ 107
Operation During CPU Sleep Mode ......................... 107
SDOx Disable .......................................................... 105
Slave Select Synchronization .................................. 107
SPI1 Register Map ................................................... 108
SPI2 Register Map ................................................... 108
Word and Byte Communication ............................... 105
Register Map for dsPIC30F6010A ........................... 163
Register Map for dsPIC30F6015 ............................. 163
Gate Operation .......................................................... 66
Interrupt ..................................................................... 67
Operation During Sleep Mode ................................... 66
Prescaler ................................................................... 66
Real-Time Clock ........................................................ 67
Register Map ............................................................. 68
16-bit Asynchronous Counter Mode .......................... 65
16-bit Synchronous Counter Mode ............................ 65
16-bit Timer Mode ...................................................... 65
ADC Event Trigger ..................................................... 74
Gate Operation .......................................................... 74
Interrupt ..................................................................... 74
Operation During Sleep Mode ................................... 74
Register Map ............................................................. 75
Timer Prescaler ......................................................... 74
32-bit Synchronous Counter Mode ............................ 69
32-bit Timer Mode ...................................................... 69
Register Map ............................................................. 79
Band Gap Start-up Time .......................................... 193
CAN Bit .................................................................... 130
CAN I/O ................................................................... 211
Center-Aligned PWM ................................................. 99
Dead-Time ............................................................... 101
Edge-Aligned PWM ................................................... 98
External Clock .......................................................... 186
Input Capture (CAPx) .............................................. 197
I
I
I
I
Motor Control PWM ................................................. 199
Motor Control PWM Fault ........................................ 199
OC/PWM .................................................................. 198
Output Compare (OCx) ............................................ 197
PWM Output .............................................................. 87
QEA/QEB Input ....................................................... 200
QEI Module Index Pulse .......................................... 201
Reset, Watchdog Timer, Oscillator Start-up
Timer and Power-up Timer ...................................... 192
SPI Master Mode (CKE = 0) .................................... 202
SPI Master Mode (CKE = 1) .................................... 203
SPI Slave Mode (CKE = 0) ...................................... 204
SPI Slave Mode (CKE = 1) ...................................... 205
Time-out Sequence on Power-up
(MCLR Not Tied to V
2
2
2
2
C Bus Data (Master Mode) ................................... 207
C Bus Data (Slave Mode) ..................................... 209
C Bus Start/Stop Bits (Master Mode) .................... 207
C Bus Start/Stop Bits (Slave Mode) ...................... 209
Interrupts ........................................................... 67
Oscillator Operation ........................................... 67
DD
© 2008 Microchip Technology Inc.
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