DJLXT386LE.B2 Intel, DJLXT386LE.B2 Datasheet - Page 45

• Manufacturer Part Number: DJLXT386LE.B2
• Manufacturer: Intel

Specifications of DJLXT386LE.B2

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
1. On power up all register bits are set to “0”.
2. MCLK is used as timing reference. If MCLK is not available then the channel TCLK is used as the reference. This feature is
1. On power up all register bits are set to “0”. Any change in the state causes an interrupt. All LOS interrupts are cleared by a
1. On power-up all the register bits are set to “0”. All DFM interrupts are cleared by a single read operation.
1. On power-up all the register bits are set to “0”and all interrupts are disabled.
1. On power-up all the register bits are set to “0”and all interrupts are disabled.
Bit
Bit
Bit
Bit
Bit
3-0
3-0
7-4
3-0
3-0
3-0
7-4
3-0
7-4
Bit
not available in data recovery and line driver mode (MCLK= High and TCLK = High)
single read operation.
Table 10. Remote Loopback Register, RLOOP (02H)
Table 11. TAOS Enable Register, TAOS (03H)
Table 12. LOS Status Monitor Register, LOS (04H)
Table 13. DFM Status Monitor Register, DFM (05H)
Table 14. LOS Interrupt Enable Register, LIE (06H)
Table 15. DFM Interrupt Enable Register, DIE (07H)
1
1
1
1
1
TAOS3-TAOS0
DFM3-DFM0
LOS3-LOS0
DIE3-DIE0
LIE3-LIE0
RL3-RL0
Name
Name
Name
Name
Name
Name
-
-
-
Setting a bit to “1” causes a continuous stream of marks to be sent out at the TTIP and
TRING pins of the respective transceiver 3-0.
Write “0” to these positions for normal operation.
Respective bit(s) are set to “1” every time the LOS processor detects a valid loss of signal
condition in transceivers 3-0.
Respective bit(s) are set to “1” every time the short circuit monitor detects a valid
secondary output driver short circuit condition in transceivers 3-0. Note that DFM is
available only in configurations with no transmit series resistors (T1 mode with
TVCC=3.3V).
Transceiver 3-0 DFM interrupts are enabled by writing a “1” to the respective bit.
Write “0” to these positions for normal operation.
Setting a bit to “1” enables remote loopback for transceivers 3-0 respectively.
Transceiver 3-0 LOS interrupts are enabled by writing a “1” to the respective bit.
Write “0” to these positions for normal operation.
QUAD T1/E1/J1 Transceiver — LXT386
Function
Function
Function
Function
Function
Function
2
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