DJLXT386LE.B2 Intel, DJLXT386LE.B2 Datasheet - Page 71

• Manufacturer Part Number: DJLXT386LE.B2
• Manufacturer: Intel

Specifications of DJLXT386LE.B2

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Address setup time to address or data strobe
Address hold time from address or data strobe
Valid address strobe pulse width
R/W setup time to active data strobe
R/W hold time from inactive data strobe
Chip select setup time to active data strobe
Chip select hold time from inactive data strobe
Address strobe active to data strobe active delay
Delay time from active data strobe to valid data
Delay time from inactive data strobe to data High Z
Valid data strobe pulse width
Inactive data strobe to inactive INT delay time
Data strobe inactive to address strobe inactive delay
DS asserted to ACK asserted delay
DS deasserted to ACK deasserted delay
Active ACK to valid data delay
AD7-AD0
1. Typical figures are at 25 C and are for design aid only; not guaranteed and not subject to production testing.
2. C
Figure 24. Multiplexed Intel Mode Write Timing
Table 48. Motorola Bus Read Timing Characteristics
L
RDY
WR
ALE
= 100pF on D0-D7, all other outputs are loaded with 50pF.
CS
INT
Tristate
Parameter
2
tSALW
tVL
ADDRESS
tDRDY
tHALW
tSLW
tSCSW
Tdackp
Tasds
Tdsas
Tdack
Tpack
Tvas
Thrw
Thcs
Tpds
Tvds
Sym
Thar
Tsrw
Tscs
Tsar
Tdz
Tint
tVRDY
tVWR
Min
10
95
10
20
60
15
5
0
0
0
3
3
–
–
–
–
QUAD T1/E1/J1 Transceiver — LXT386
Typ
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1
Max
30
30
10
40
10
–
–
–
–
–
–
–
–
–
–
0
WRITE DATA
tDRDY
tSDW
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tHCSW
tINT
Test Conditions
tHDW
Tristate
tDRDYZ
71