DJLXT386LE.B2 Intel, DJLXT386LE.B2 Datasheet - Page 7

• Manufacturer Part Number: DJLXT386LE.B2
• Manufacturer: Intel

Specifications of DJLXT386LE.B2

• Lead Free Status / RoHS Status: Not Compliant

1.0
Datasheet
Figure 1. LXT386 Block Diagram
Features
JTAG
SERIAL/
PARALLEL
PORT
RTIP
RRING
TTIP
TRING
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•
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•
•
•
•
•
•
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Single rail 3.3V supply with 5V tolerant inputs
Low power consumption of 150mW per channel (typical)
Superior crystal-less jitter attenuator
Hitless Protection Switching (HPS) for 1 to 1 protection without relays
HDB3, B8ZS, or AMI line encoder/decoder
Provides protected monitoring points per ITU G.772
Analog/digital and remote loopback testing functions
LOS per ITU G.775, ETS 300 233 and T1.231
8 bit parallel or 4 wire serial control interface
Hardware and Software control modes
JTAG Boundary Scan test port per IEEE 1149.1
160 PBGA and 100 pin LQFP packages
— Meets ETSI CTR12/13, ITU G.736, G.742, G.823 and AT&T Pub 62411 specifications
— Optimized for SONET/SDH applications, meets ITU G.783 mapping jitter specification
— Constant throughput delay jitter attenuator
DATA SLICER
LINE DRIVER
HARDWARE / SOFTWARE CONTROL
(JTAG INTERFACE)
RECOVERY
SHAPER
CLOCK
PULSE
LOS
CLOCK
DATA
PULSE
ATTENUATOR
ATTENUATOR
RX OR TX
RX OR TX
JITTER
JITTER
PATH
PATH
QUAD T1/E1/J1 Transceiver — LXT386
B8ZS / HDB3
B8ZS / HDB3
DECODER
ENCODER
0
1
2
3
MODE
LOOP 0..3
JASEL
CLKE
MCLK
LOS
RPOS
RCLK
RNEG
TPOS
TCLK
TNEG
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