NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 125

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NH82801DB S L8DE

Manufacturer Part Number
NH82801DB S L8DE
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801DB S L8DE

Lead Free Status / RoHS Status
Compliant
5.9.1
5.9.2
5.9.3
Intel
®
Table 5-27. Stop Frame Explanation
82801DB ICH4 Datasheet
Start Frame
The serial IRQ protocol has two modes of operation which affect the start frame. These two modes
are: Continuous, where the ICH4 is solely responsible for generating the start frame; and Quiet,
where a serial IRQ peripheral is responsible for beginning the start frame.
The mode that must first be entered when enabling the serial IRQ protocol is continuous mode. In
this mode, the ICH4 asserts the start frame. This start frame is 4-, 6-, or 8-PCI clocks wide, based
upon the Serial IRQ Control Register (bits 1:0 at 64h in Device 31:Function 0 configuration space).
This is a polling mode.
When the serial IRQ stream enters quiet mode (signaled in the Stop Frame), the SERIRQ line
remains inactive and pulled up between the Stop and Start Frame until a peripheral drives the
SERIRQ signal low. The ICH4 senses the line low and continues to drive it low for the remainder
of the Start Frame. Since the first PCI clock of the start frame was driven by the peripheral in this
mode, the ICH4 drives the SERIRQ line low for 1 PCI clock less than in continuous mode. This
mode of operation allows for a quiet, and, therefore, lower power operation.
Data Frames
Once the Start frame has been initiated, all of the SERIRQ peripherals must start counting frames
based on the rising edge of SERIRQ. Each of the IRQ/DATA frames has exactly three phases of
one clock each:
Stop Frame
After all data frames, a Stop Frame are driven by the ICH4. The SERIRQ signal is driven low by
the ICH4 for 2 or 3 PCI clocks. The number of clocks is determined by the SERIRQ configuration
register. The number of clocks determines the next mode:
Stop Frame Width
Sample Phase. During this phase, the SERIRQ device drives SERIRQ low if the
corresponding interrupt signal is low. If the corresponding interrupt is high, then the SERIRQ
devices will tri-state the SERIRQ signal. The SERIRQ line will remain high due to pull-up
resistors (there is no internal pull-up resistor on this signal, an external pull-up resistor is
required). A low level during the IRQ0-1 and IRQ2-15 frames indicates that an active-high
ISA interrupt is not being requested, but a low level during the PCI INT[A:D], SMI#, and
IOCHK# frame indicates that an active-low interrupt is being requested.
Recovery Phase. During this phase, the device drives the SERIRQ line high if in the Sample
Phase it was driven low. If it was not driven in the sample phase, it will be tri-stated in this
phase.
Turn-around Phase. The device will tri-state the SERIRQ line
2 PCI clocks
3 PCI clocks
Quiet Mode. Any SERIRQ device may initiate a Start Frame
Continuous Mode. Only the host (ICH4) may initiate a Start Frame
Next Mode
Functional Description
125

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