MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 1050

no-image

MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDT512CAA
Manufacturer:
FREESCALE
Quantity:
2 235
Part Number:
MC9S12XDT512CAA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDT512CAA
Manufacturer:
FREESCALE
Quantity:
2 235
Part Number:
MC9S12XDT512CAAR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
then 182 kHz. In this case, the EEPROM program and erase algorithm timings are increased over the
optimum target by:
If the ECLKDIV register is written, the EDIVLD bit is set automatically. If the EDIVLD bit is 0, the
ECLKDIV register has not been written since the last reset. If the ECLKDIV register has not been written
to, the EEPROM command loaded during a command write sequence will not execute and the ACCERR
flag in the ESTAT register will set.
1052
Program and erase command execution time will increase proportionally
with the period of EECLK. Because of the impact of clock synchronization
on the accuracy of the functional timings, programming or erasing the
EEPROM memory cannot be performed if the bus clock runs at less than 1
MHz. Programming or erasing the EEPROM memory with EECLK < 150
kHz should be avoided. Setting ECLKDIV to a value such that EECLK <
150 kHz can destroy the EEPROM memory due to overstress. Setting
ECLKDIV to a value such that (1/EECLK+Tbus) < 5 s can result in
incomplete programming or erasure of the EEPROM memory cells.
MC9S12XDP512 Data Sheet, Rev. 2.21
200 182
CAUTION
200 100
=
9%
Freescale Semiconductor

Related parts for MC9S12XDT512CAA