MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 598

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MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 16 Interrupt (S12XINTV1)
16.1.4
Figure 16-1
598
Peripheral
Interrupt Requests
Wake up
XGATE
XGATE
Requests
(Up to 112 Channels)
One Set Per Channel
Block Diagram
shows a block diagram of the XINT module.
Decoder
Priority
RQST
To XGATE Module
Non I Bit Maskable
Vector
ID
IRQ Channel
Channels
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 16-1. XINT Block Diagram
XGATE
Interrupts
INT_XGPRIO
PRIOLVL2
PRIOLVL1
PRIOLVL0
Interrupt
Requests
RQST
PRIOLVLn
INT_XGPRIO = XGATE Interrupt Priority
IVBR
IPL
= bits from the channel configuration
in the associated configuration register
DMA Request Route,
Priority Level
= Interrupt Vector Base
= Interrupt Processing Level
Wake Up
CPU
IVBR
Address
Vector
Freescale Semiconductor
New
IPL
Current
IPL

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