MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 556

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MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 14 Voltage Regulator (S12VREG3V3V5)
14.1.3
Figure 14-1
REG consists of two parallel subblocks, REG1 and REG2, providing two independent output voltages.
556
V
V
V
DDR
DDA
SSA
Bus Clock
Block Diagram
shows the function principle of VREG_3V3 by means of a block diagram. The regulator core
V
REGEN
LVD
LVD: Low-Voltage Detect
LVR: Low-Voltage Reset
POR: Power-On Reset
Figure 14-1. VREG_3V3 Block Diagram
CTRL
MC9S12XDP512 Data Sheet, Rev. 2.21
API
Rate
Select
REG2
REG1
REG: Regulator Core
CTRL: Regulator Control
API: Auto. Periodical Interrupt
VBG
API
LVR
PIN
LVR
API
LVI
POR
Freescale Semiconductor
V
V
V
POR
V
DDPLL
SSPLL
DD
SS

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