MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 70

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MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 1 Device Overview MC9S12XD-Family
1
The configuration of the oscillator can be selected using the XCLKS signal (see
description please refer to the S12CRG section.
The logic level on the voltage regulator enable pin V
regulator is enabled or disabled (see
70
Normal single chip
Special single chip
Emulation single chip
Normal expanded
Emulation expanded
Special test
Internal means resources inside the MCU are read/written.
Internal Flash means Flash resources inside the MCU are read/written.
Emulation memory means resources inside the emulator are read/written (PRU registers, Flash replacement, RAM, EEPROM,
and register space are always considered internal).
External application means resources residing outside the MCU are read/written.
Chip Modes
PE7 = XCLKS
V
REGEN
0
1
1
0
BKGD =
MODC
1
0
0
1
0
0
Full swing Pierce oscillator or external clock source selected
Loop controlled Pierce oscillator selected
Internal voltage regulator enabled
Internal voltage regulator disabled, V
supplied externally
Table 1-10. Clock Selection Based on PE7
Table 1-9. Chip Modes and Data Sources
Table 1-11. Voltage Regulator VREGEN
MC9S12XDP512 Data Sheet, Rev. 2.21
Table
MODB
PE6 =
0
0
0
0
1
1
1-11).
MODA
PE5 =
0
0
1
1
1
0
REGEN
Description
Description
determines whether the on-chip voltage
ROMCTL
PK7 =
DD1,2
X
X
X
0
1
0
1
1
0
1
and V
DDPLL
EROMCTL
PE3 =
must be
X
0
1
X
X
X
0
1
X
X
Table
Freescale Semiconductor
Internal
Emulation memory
Internal Flash
External application
Internal Flash
External application
Emulation memory
Internal Flash
External application
Internal Flash
1-10). For a detailed
Data Source
1

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