L-ET1011C2-CI-D LSI, L-ET1011C2-CI-D Datasheet - Page 22

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L-ET1011C2-CI-D

Manufacturer Part Number
L-ET1011C2-CI-D
Description
Manufacturer
LSI
Datasheet

Specifications of L-ET1011C2-CI-D

Number Of Receivers
1
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / Rohs Status
Compliant

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Gigabit Ethernet Transceiver
Hardware Interfaces
MAC Interface
The ET1011C supports RGMII, GMII, MII, RTBI, and TBI
interfaces to the MAC. The MAC interface mode is selected
via the hardware configuration pins, MAC_IF_SEL[2:0].
Gigabit Media-Independent Interface (GMII)
(128-Pin TQFP and 84-Pin MLCC Only)
The GMII is fully compliant with IEEE 802.3 clause 35. The
GMII interface mode is selected by setting the hardware con-
figuration pins MAC_IF_SEL[2:0] = 000.
Table 3. GMII Signal Description (1000Base-T Mode) (128-Pin TQFP and 84-Pin MLCC only)
22
GTX_CLK
Pin Name
RXD[7:0]
TXD[7:0]
RX_CLK
RX_DV
TX_ER
TX_EN
RX_ER
CRS
COL
97, 98, 99,
7, 6, 5, 4,
100, 105,
106, 107,
127, 126
128-Pin
TQFP
3, 128,
Pin #
121
124
125
109
108
113
110
116
115
3, 2, 1, 84,
83, 82, 81,
59, 60, 61,
62, 65, 66,
(continued)
MLCC
84-Pin
67, 68
Pin #
77
78
79
80
72
70
69
74
73
Transmit clock The MAC drives this 125 MHz clock signal that is held low during
Transmit error The MAC drives this signal high to indicate a transmit coding error.
Receive clock The ET1011C generates a 125 MHz clock to synchronize receive
Transmit data
Receive error The ET1011C drives RX_ER to indicate that an error was detected
Carrier sense The carrier sense signal (CRS) of the MAC interface is asserted by
Receive data
Receive data
Description
bits 7—0
Transmit
Collision
enable
detect
valid
Pin
autonegotiation or when operating in modes other than 1000Base-T.
The MAC drives this signal high to indicate that data is available on
the transmit data bus.
The MAC transmits data synchronized with GTX_CLK to the
ET1011C for transmission on the media-dependent (transformer)
interface.
data.
in the frame that was received and is being transmitted to the MAC.
The ET1011C drives RX_DV to indicate that it is sending recov-
ered and decoded data to the MAC.
The ET1011C transmits data that is synchronized with RX_CLK to
the MAC.
the ET1011C whenever the receive medium is nonidle. In half-
duplex mode, CRS may also be asserted when the transmit medium
is nonidle. The CRS may be enabled on transmit in half-duplex
mode by writing to the PHY configuration register, address 22, bit
15.
In 10Base-T, 100Base-TX, and 1000Base-T half-duplex modes,
COL is asserted when both transmit and receive media are nonidle.
Figure 10. GMII MAC-PHY Signals
Functional Description
MAC
GTX_CLK
TXD[7:0]
RXD[7:0]
RX_CLK
RX_ER
RX_DV
TX_ER
TX_EN
CRS
COL
PHY
September 2007
LSI Corporation

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