L-ET1011C2-CI-D LSI, L-ET1011C2-CI-D Datasheet - Page 50

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L-ET1011C2-CI-D

Manufacturer Part Number
L-ET1011C2-CI-D
Description
Manufacturer
LSI
Datasheet

Specifications of L-ET1011C2-CI-D

Number Of Receivers
1
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / Rohs Status
Compliant

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Gigabit Ethernet Transceiver
Register Description
Register Functions/Settings
Table 38. Loopback Control Register—Address 19
1. Replica loopback is not available in 10Base-T.
2. This bit can be used to force link status okay during MII loopback. In MII loopback, the link status bit will not be set unless force link status is used. In all
Loopback Mode Settings
The following table shows how the loopback bit (0.14) and the cable diagnostic mode bit (23.13) should be set for
each loopback mode. It also indicates whether the loopback mode sets the link status bit and when the PHY is
ready to receive data.
Table 39. Loopback Bit (0.14) and Cable Diagnostic Mode Bit (23.13) Settings for Loopback Mode
50
other loopback modes, the link status bit will be set when the link comes up.
14:13
Bit
9:8
6:1
15
12
10
11
7
0
Line Driver
All Digital
Loopback
Ext Cable
Replica
MII
MII
Reserved
All Digital
Replica
Line Driver
Reserved
External Cable
Reserved
Force Link Status
Name
(continued)
Loopback
Required
Bit 0.14
(continued)
Yes
Yes
Yes
Yes
No
1 = MII loopback selected.
0 = MII loopback not selected.
1 = All digital loopback selected.
0 = All digital loopback not selected.
1 = Replica loopback selected.
0 = Replica loopback not selected.
1 = Line driver loopback selected.
0 = Line driver loopback not selected.
1 = External cable loopback enabled.
0 = External cable loopback disabled.
1 = Force link status okay in MII loopback.
2 = Force link status not okay in MII loopback.
Loopback Control Register
Cable Diagnostic Mode
Bit 23.13 = 1
Required
Description
Yes
Yes
Yes
Yes
No
Link Status Set
Bit 26.6
19.0
Yes
Yes
Yes
Yes
Type
R/W
R/W
R/W
R/W
R/W
R/W
PHY Ready for Data
Default
After a few ms
September 2007
Link Status
Link Status
Link Status
Link Status
1
0
0
0
0
0
LSI Corporation
Notes
1
2

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