DP8522AV-25 National Semiconductor, DP8522AV-25 Datasheet - Page 26

• Manufacturer Part Number: DP8522AV-25
• Description: IC CTRLR 4M VRAM 25MHZ 68PLCC
• Manufacturer: National Semiconductor

Specifications of DP8522AV-25

• Controller Type: Video RAM Controller, Drivers
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Interface: -
• Other names: *DP8522AV-25

6 0 DP8520A 21A 22A Video RAM Support
During a transfer cycle (VSRL asserted during the access)
WIN is disabled from affecting the DT OE logic until the
transfer cycle is completed as shown by CAS negating Dur-
ing a transfer cycle the SOE (Serial Output Enable) input to
the VRAM is asserted and is used as an output control for a
read transfer cycle and is used as a write enable control
during a write transfer cycle When SOE is negated serial
access is disabled and a transfer cycle cannot take place
SOE asserted during a read enables the serial input output
bus SI O (0 –3) while the VRAM data bus (DQ0–3) is put
into a high impedance state thus allowing the transfer cycle
FIGURE 26 Video RAM Timing Pseudo WRITE Transfer Cycle B Port Active
(Transfer Shift Register Data into VRAM Row)
26
to take place from the serial port In addition to both read
and write transfer cycles the DP8520A 21A 22A also sup-
ports pseudo write transfer cycles (see Figure 26 ) A pseu-
do write transfer cycle must be performed after a read trans-
fer cycle if the subsequent operation is a write transfer cy-
cle The DP8520A 21A 22A VRAM controller is operated
as if it is doing a write transfer cycle but since the SOE input
to the VRAM is negated (disabling the serial port) a transfer
doesn’t take place The purpose of this pseudo write trans-
fer cycle is to switch the SI O (0– 3) lines of the VRAM’s
serial port from output mode to input mode
(Continued)
TL F 9338– 79