CS8952-IQZ Cirrus Logic Inc, CS8952-IQZ Datasheet - Page 33

IC TXRX 100/10 PHY 100TQFP

CS8952-IQZ

Manufacturer Part Number
CS8952-IQZ
Description
IC TXRX 100/10 PHY 100TQFP
Manufacturer
Cirrus Logic Inc
Type
Transceiverr
Datasheet

Specifications of CS8952-IQZ

Package / Case
100-TQFP, 100-VQFP
Protocol
MII
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Transceivers
Number Of Transceivers
1
Standard Supported
100BASE-FX or 100BASE-TX or 10BASE-T
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
6 V
Supply Voltage (min)
- 0.3 V
Supply Current (max)
+/- 10 mA
Maximum Operating Temperature
+ 70 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1208

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Part Number
Manufacturer
Quantity
Price
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CS8952-IQZ
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Part Number:
CS8952-IQZR
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6.2
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
DS206F1
15
14
13
12
11
10:7
6
5
4
100BASE-T4
BIT
Reserved
15
7
100BASE-T4
100BASE-TX/Full
Duplex
100BASE-TX/Half
Duplex
10BASE-T/Full
Duplex
10BASE-T/Half
Duplex
Reserved
MF Preamble Sup-
pression
Auto-Neg Complete Read Only 0
Remote Fault
Basic Mode Status Register - Address 01h
NAME
100BASE-TX/
MF Preamble
Suppression
Full Duplex
14
6
Read Only 0
Read Only 1
Read Only 1
Read Only 1
Read Only 1
Read Only 0000
Read Only 1
Read Only 0
100BASE-TX/
Half Duplex
Auto-Neg
Complete
TYPE
13
5
Remote Fault
10BASE-T/
Full Duplex
RESET
12
4
Half Duplex
10BASE-T/
Auto-Neg
The CS8952 does not support 100BASE-T4 opera-
tion, so this bit will always read 0.
When this bit is set, it indicates that the CS8952 is
capable of 100BASE-TX Full-Duplex operation. This
bit reflects the status of the 100BASE-TX/Full-Duplex
bit in the Auto-Negotiation Advertisement Register
(address 04h).
When this bit is set, it indicates that the CS8952 is
capable of 100BASE-TX Half-Duplex operation. This
bit reflects the status of the 100BASE-TX/Half
Duplex bit in the Auto-Negotiation Advertisement
Register (address 04h).
When this bit is set, it indicates that the CS8952 is
capable of 10BASE-T Full-Duplex operation. This bit
reflects the status of the 10BASE-T/Full Duplex bit in
the Auto-Negotiation Advertisement Register
(address 04h).
When this bit is set, it indicates that the CS8952 is
capable of 10BASE-T Half-Duplex operation. This bit
reflects the status of the 10BASE-T/Half Duplex bit in
the Auto-Negotiation Advertisement Register
(address 04h).
When set, this bit indicates that the CS8952 is capa-
ble of accepting management frames regardless of
whether they are preceded by the preamble pattern.
When clear, it indicates that the management frame
must be preceded by the preamble pattern to be con-
sidered valid. This bit reflects the status of the MR
Preamble Enable bit in the PCS Sub-Layer Configu-
ration Register (address 17h).
This bit is set to a 1 when the auto-negotiation pro-
cess has completed. This is an indication that data is
valid in the Auto-Negotiation Advertisement Register
(address 04h), the Auto-Negotiation Link Partner
Ability Register (address 05h), and the Auto-Negotia-
tion Expansion Register (address 06h).
When auto-negotiation is enabled, this bit is set if the
Remote Fault bit is set in the Auto-Negotiation Link
Partner Ability Register (address 05h). When auto-
negotiation is disabled, this bit will be set when a Far-
End Fault Indication for 100BASE-TX is detected.
Ability
11
3
Link Status
10
2
DESCRIPTION
Jabber Detect
Reserved
9
1
CS8952
Capability
Extended
8
0
33

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