PEF24901HV22XT Lantiq, PEF24901HV22XT Datasheet - Page 19

PEF24901HV22XT

Manufacturer Part Number
PEF24901HV22XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF24901HV22XT

Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
DFE-T
PEF 24901
Introduction
Alternatively the clocking scheme as shown in
Figure 5
may be applied if more than 3
devices are to be clocked (e.g. in a 16-channel line card application). Instead to supply
the 2nd AFE with the master clock at pin CL15, here the 15.36 MHz master clock is input
at pin XIN. Thereby pin CL15 is configured as output and passes the 15.36 MHz clock
on to the attached DFE-T. If the clock chain is extended in the same way by another two
AFE/DFE-T chip sets a 16-channel line card application can be realized with just one
single crystal. Note that the 15.36 MHz clock is inverted once by the AFE if it is input at
XIN and output at CL15. This way the duty cycle is recovered again.
Data Sheet
20
2002-09-30

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