PEF24901HV22XT Lantiq, PEF24901HV22XT Datasheet - Page 90

• Manufacturer Part Number: PEF24901HV22XT
• Manufacturer: Lantiq

Specifications of PEF24901HV22XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

6
In this section the complete register map is described that is provided with the new MON-
12 protocol. For the protocol details please refer to
The register address arrangement is given in
provided per line port. By register LP_SEL it can be determined which U register bank
and by that which line port number is addressed. LP_SEL adds an offset value to the
current address. The offset value is latched as long as register LP_SEL is overwritten
again.
Figure 28
Data Sheet
Register Description
ADR
DFE-T V2.2 Register Map
1CH
6..0
Offset
LP_SEL
+
0FH TEST
10H
91
U Register
Banks
U Registers
Figure
U Registers
Chapter
28. The U-interface registers are
Line Port 0
3.2.4.
Line Port 1
Line Port 2
regmap_cust
Register Description
Line Port 3
PEF 24901
2002-09-30
DFE-T