PEF24901HV22XT Lantiq, PEF24901HV22XT Datasheet - Page 4

• Manufacturer Part Number: PEF24901HV22XT
• Manufacturer: Lantiq

Specifications of PEF24901HV22XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Data Sheet
Revision History:
Chapter 3.5
Chapter 3.5.1
Chapter
Chapter 3.5.11.2
Page
Page 45
Page 47
Table 12
Chapter 3.5.9
Figure 17
Table 14
Chapter 3.5.11.1
Chapter 3.5.11.2
Page 64
Chapter 3.5.5
Chapter 3.5.11.1
Chapter 3.6
Chapter 4.1
Chapter 4.2
Figure 26
Chapter 4.4.1.2
Data Sheet
15,
3.5.8,
removed from 1 kHz Frame: ’..40 kHz block clock’
removed ’After successful synchronization, resynchronization will
occur if the syncword is not detected at the expected position in 64
consecutive frames.
The U-transceiver is synchronized, if it detects the syncword four
times consecutively within a period of 1 ms.’
removed U2A (not supported)
removed statement on performance on 0.6mm FTZ loops
removed transparent messages
refined description of signal detection, removed transparent channel
from table 4B3T signal elements
refined description C/I-codes, changed validation times of C/I-
commands, introduced LTD
updated state machine
updated differences to the former state machine
changes to state machine inputs:
C/I=AR1: no reset of receiver
C/I DC: state Deactivted is entered
C/I-indication ’AI’ is also issued if test loop #1 has been activated
Transparent state may also be entered by loopback 1 (not loopback
2)
reworked chapter block error counter
AR1, AR2, and AR4: added description of resolving loopback
requests
changed chapter ’clock generation’,
added to HW reset: ’...the 15.36 MHz ...’, ’ ...Note that FSC and
DCL...’
the DFE-T goes in power down, if the U-transceiver is in state
’Deactivated’ and no MONITOR message is pending
testloops repeater: #4
removed fig: ’Loopback #2’
2002-09-30
4
DS1, 2002-09-30
PEF 24901
DS1
DFE-T