PEF24901HV22XT Lantiq, PEF24901HV22XT Datasheet - Page 35

• Manufacturer Part Number: PEF24901HV22XT
• Manufacturer: Lantiq

Specifications of PEF24901HV22XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

New MON-12 Class
By use of MON-12 commands the DFE-T V2.2 provides the ability to address parts of
the device internal register map and thus to address functions that have been added with
version 2.2. MON-12 commands are always prioritized and processed first if other
Monitor commands are outstanding. See
This means that Monitor commands are split into two categories. Each category derives
its name from the first nibble (4 bits) of the two byte long message. These are:
• MON-12
• MON-8
The various MON-8-commands are discussed in detail in chapter
Structure
The structure of the Monitor channel is 8-bit wide, located at bit position 17 – 24 in every
time-slot. Monitor commands/messages sent to/from the U-transceiver are always 2
bytes long.
Transmission of multiple monitor bytes is specified by IOM
“Handshake Procedure” for details). For handshake control in multiple byte transfers, bit
31, monitor read “MR”, and bit 32, monitor transmit “MX”, of every time-slot are used.
Verification
A double last-look criterion is implemented for the monitor channel. If the monitor
message that was received consecutively after a change has been detected is not
identical to the message that was received before the message will be aborted.
Handshake Procedure
IOM
messages. For handshake control two bits, MX and MR, are assigned to each IOM
frame (on DIN and DOUT). The monitor transmit bit (MX) indicates when a new byte has
been issued in the monitor channel (active low). The transmitter postpones transmitting
the next information until the correct reception has been confirmed. A correct reception
will be confirmed by setting the monitor read bit (MR) to low.
The monitor channel is full duplex and operates on a pseudo-asynchronous base, i.e.
while data transfer on the bus takes place synchronized to frame synchronization, the
flow of monitor data is controlled by the MR- and MX-bits. Monitor data will be transmitted
repeatedly until its reception is acknowledged.
Figure 10
monitor command followed by a 2-byte response requires a minimum of 16 IOM
frames (reception 8 frames + transmission 8 frames = 1.875 ms). In case the controller
is able to confirm the receipt of first response byte in the frame immediately following the
Data Sheet
®
-2 provides a sophisticated handshake procedure for the transfer of monitor
illustrates a monitor transfer at maximum speed. The transmission of a 2-byte
(Internal Register Map)
(Local Functions)
Chapter 3.2.4
36
for the details.
Functional Description
®
-2 (see next section
Chapter
PEF 24901
5.
2002-09-30
DFE-T
®
®
-2
-2