PEF24901HV22XT Lantiq, PEF24901HV22XT Datasheet - Page 92

• Manufacturer Part Number: PEF24901HV22XT
• Manufacturer: Lantiq

Specifications of PEF24901HV22XT

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

•
Table 22
Register
TEST
LOOP
6.1.2
Registers TEST and LOOP are evaluated and executed immediately.
6.2
6.2.1
The Test register sets the U-transceiver in the desired test mode. Note that the test
modes ’Data Through’ and ’Send Single Pulses’ are activated via the C/I channel or by
pin strapping.
TEST
Reset value: 00
BER
Data Sheet
7
0
Mode Register Evaluation Timing
Detailed Register Description
TEST - Test Register
Bit Error Rate Measurement Function
allows to measure the BER of the B1-, B2- and D-channel in the
Transparent state,
prerequisite: closed loopback #2 on the NT side, reset of the BERC
counter by read access and a continuous series of zeros is sent
00 =
01 =
10 =
11 =
Reset of U-Transceiver Functions During Deactivation or with CI
Code RESET
H
Reset to
00
6
0
Bit Error Rate (BERC) counter disabled
Reserved
Reserved
Bit Error Rate counter (BERC) is enabled,
starts BER measurement for the B1-, B2- and D-channel,
zeros are sent in channel B1, B2 and D
H
5
Affected Bits/ Comment
only the bits LBBD, LB2 and LB1 are reset
BER
read*
4
93
)
/write
3
0
2
0
Register Description
1
0
Address: 0F
PEF 24901
2002-09-30
DFE-T
0
0
H