PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 295

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

XLS
XLO
Receive Service Word Pulseframe (Read)
RSW
RSI
RRA
RY(4:0)
Data Sheet
RSI
7
Transmit Line Short
Significant only if the ternary line interface is selected by
LIM1.DRS = 0.
0 =
1 =
Transmit Line Open
0 =
1 =
Receive Spare Bit for International Use
First bit of the received service word. It is fixed to one if CRC-
multiframe mode is enabled.
Receive Remote Alarm
Equivalent to bit FRS0.RRA.
Receive Spare Bits for National Use (Y-Bits, S
Normal operation. No short is detected.
Normal operation
The XL1 and XL2 are shortened for at least 3 pulses. As a
reaction of the short the pins XL1 and XL2 are automatically
forced into a high-impedance state if bit XPM2.DAXLT is reset.
After 128 consecutive pulse periods the outputs XL1/2 are
activated again and the internal transmit current limiter is
checked. If a short between XL1/2 is still further active the
outputs XL1/2 are in high-impedance state again. When the
short disappears pins XL1/2 are activated automatically and
this bit is reset. With any change of this bit an interrupt
ISR1.XLSC is generated. In case of XPM2.XLT is set this bit is
frozen.
This bit is set if at least 32 consecutive zeros were sent on pins
XL1/XL2 or XDOP/XDON. This bit is reset with the first
transmitted pulse. With the rising edge of this bit an interrupt
ISR1.XLSC is set. In case of XPM2.XLT is set this bit is frozen.
RRA
RY0
295
RY1
RY2
RY3
n
-Bits, S
FALC56 V1.2
RY4
E1 Registers
0
PEB 2256
a
2002-08-27
-Bits)
(4E)