PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 45

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

Table 4
Pin
No.
60
61
62
63
Data Sheet
Ball
No.
B8
A9
A8
B7
Pin Definitions - System Interface (cont’d)
Symbol
XPA
XPB
XPC
XPD
Input (I)
Output (O)
Supply (S)
I + PU
I + PU
I + PU
Function
Synchronous Pulse Transmit (SYPX)
PC(1:4).XPC(3:0) = 0000
Together with the values of registers XC(0:1)
this signal defines the beginning of time slot 0
at system highway port XDI .
The pulse cycle is an integer multiple of
125 s.
SYPX must not be used in parallel with XMFS.
Transmit Multiframe Synchronization
(XMFS)
PC(1:4).XPC(3:0) = 0001
This port defines the frame and multiframe
begin on the transmit system interface ports
XDI and XSIG.
Depending on PC5.CXMFS the signal on
XMFS is active high or low.
XMFS must not be used in parallel with SYPX.
Note: A new multiframe position has settled at
Transmit Signaling Data (XSIG)
PC(1:4).XPC(3:0) = 0010
Input for transmit signaling data received from
the signaling highway. Optionally,
(SIC3.TTRF = 1), sampling of XSIG data is
controlled by the active high XSIGM marker. At
higher data rates sampling of data is defined by
bits SIC2.SICS(2:0).
45
least one multiframe after pulse XMFS
has been supplied.
Pin Descriptions
FALC56 V1.2
PEB 2256
2002-08-27