CY7C63413-PVXC Cypress Semiconductor Corp, CY7C63413-PVXC Datasheet - Page 3

• Manufacturer Part Number: CY7C63413-PVXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C63413-PVXC

• Cpu Family: enCoRe II
• Device Core: M8C
• Device Core Size: 8b
• Frequency (max): 12MHz
• Interface Type: USB
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 24
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25/5.5V
• Operating Supply Voltage (min): 4/4.35V
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: SSOP
• Lead Free Status / Rohs Status: Compliant

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Document #: 38-08027 Rev. *B
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Note:
1. CY7C63613C is not bonded out for all GPIO pins shown in Logic Block Diagram. Refer to pin configuration diagram for bonded out pins. See note on page 12
Logic Block Diagram
6-MHz ceramic resonator
for firmware code needed for unused GPIO pins.
12 MHz
4/6/8 Kbyte
256 byte
Watch Dog
Power-on
EPROM
12-MHz
Reset
12-bit
Timer
Timer
OSC
RAM
CPU
8-bit
6 MHz
Transceiver
Controller
Interrupt
PORT 0
PORT 1
PORT 2
PORT 3
PORT
GPIO
GPIO
GPIO
DAC
GPIO
USB
USB
SIE
CY7C63513C only
D+
D–
P0[0]
P0[7]
P1[0]
P1[7]
P2[0]
P2[7]
P3[0]
P3[7]
DAC[0]
DAC[7]
See Note 1
USB
PS/2
PORT
High Current
Outputs
P3[7]
P3[5]
P3[3]
P3[1]
P2[7]
P2[5]
P2[3]
P2[1]
P1[7]
P1[5]
P1[3]
P1[1]
P0[7]
P0[5]
P0[3]
P0[1]
V
Vss
D+
D–
PP
DAC[7]
DAC[5]
DAC[3]
DAC[1]
CY7C63413C
P3[7]
P3[5]
P3[3]
P3[1]
P2[7]
P2[5]
P2[3]
P2[1]
P1[7]
P1[5]
P1[3]
P1[1]
P0[7]
P0[5]
P0[3]
P0[1]
40-pin PDIP
V
Pin Configuration
Vss
D+
D–
PP
CY7C63513C
48-pin SSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
V
V
P3[6]
P3[4]
P3[2]
P3[0]
P2[6]
P2[4]
P2[2]
P2[0]
P1[6]
P1[4]
P1[2]
P1[0]
P0[6]
P0[4]
P0[2]
P0[0]
XTAL
XTAL
CC
SS
OUT
IN
0
V
Vss
P3[6]
P3[4]
P3[2]
P3[0]
P2[6]
P2[4]
P2[2]
P2[0]
P1[6]
P1[4]
P1[2]
P1[0]
DAC[6]
DAC[4]
P0[6]
P0[4]
P0[2]
P0[0]
DAC[2]
DAC[0]
XTAL
XTAL
CC
OUT
IN
DAC[7]
DAC[5]
P3[3]
P3[1]
P2[7]
P2[5]
P2[3]
P2[1]
P1[7]
P1[5]
P1[3]
P1[1]
P0[5]
P0[7]
P3[7]
P3[5]
P1[3]
P1[1]
P0[7]
P0[5]
P0[3]
P0[1]
V
Vss
P3[7]
P3[5]
P3[3]
P3[1]
P2[7]
P2[5]
P2[3]
P2[1]
P1[7]
P1[5]
P1[3]
P1[1]
P0[7]
P0[5]
P0[3]
P0[1]
D+
D–
PP
V
Vss
CY7C63413C
CY7C63513C
CY7C63613C
NC
NC
NC
NC
D+
D–
PP
CY7C63413C
CY7C63413C
48-pin SSOP
CY7C63613C
48-Pad Die
24-pin SOIC
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Page 3 of 32
24
23
22
21
20
19
18
17
16
15
14
13
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
V
P3[6]
P3[4]
P1[2]
P1[0]
P0[6]
P0[4]
P0[2]
P0[0]
XTAL
XTAL
CC
SS
V
Vss
P3[6]
P3[4]
P3[2]
P3[0]
P2[6]
P2[4]
P2[2]
P2[0]
P1[6]
P1[4]
P1[2]
P1[0]
NC
NC
P0[6]
P0[4]
P0[2]
P0[0]
NC
NC
XTAL
XTAL
CC
P3[2]
P3[0]
P2[6]
P2[4]
P2[2]
P2[0]
P1[6]
P1[4]
P1[2]
P1[0]
DAC[6]
DAC[4]
P0[6]
P0[4]
OUT
IN
OUT
IN
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