CY7C63413-PVXC Cypress Semiconductor Corp, CY7C63413-PVXC Datasheet - Page 9

• Manufacturer Part Number: CY7C63413-PVXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C63413-PVXC

• Cpu Family: enCoRe II
• Device Core: M8C
• Device Core Size: 8b
• Frequency (max): 12MHz
• Interface Type: USB
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 24
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25/5.5V
• Operating Supply Voltage (min): 4/4.35V
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: SSOP
• Lead Free Status / Rohs Status: Compliant

Document #: 38-08027 Rev. *B
I/O Register Summary
I/O registers are accessed via the I/O Read (IORD) and I/O
Write (IOWR, IOWX) instructions. IORD reads the selected
port into the accumulator. IOWR writes data from the accumu-
Table 1. I/O Register Summary
Port 0 Data
Port 1 Data
Port 2 Data
Port 3 Data
Port 0 Interrupt Enable
Port 1 Interrupt Enable
Port 2 Interrupt Enable
Port 3 Interrupt Enable
GPIO Configuration
USB Device Address A
EP A0 Counter Register
EP A0 Mode Register
EP A1 Counter Register
EP A1 Mode Register
EP A2 Counter Register
EP A2 Mode Register
USB Status & Control
Global Interrupt Enable
Endpoint Interrupt Enable
Timer (LSB)
Timer (MSB)
WDR Clear
DAC Data
DAC Interrupt Enable
DAC Interrupt Polarity
DAC Isink
Processor Status & Control
Note:
2. DAC I/O Port not bonded out on CY7C63613C. See note on page 12 for firmware code needed for unused GPIO pins.
Register Name
I/O Address
0x38-0x3F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x10
0x12
0x13
0x14
0x15
0x16
0x1F
0x20
0x21
0x24
0x25
0x26
0x30
0x31
0x32
0xFF
0x11
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/C
R/C
W
W
W
W
W
W
W
W
R
R
lator to the selected port. Indexed I/O Write (IOWX) adds the
contents of X to the address in the instruction to form the port
address and writes data from the accumulator to the specified
port. Note that specifying address 0 (e.g., IOWX 0h) means
the I/O port is selected solely by the contents of X.
GPIO Port 0
GPIO Port 1
GPIO Port 2
GPIO Port 3
Interrupt enable for pins in Port 0
Interrupt enable for pins in Port 1
Interrupt enable for pins in Port 2
Interrupt enable for pins in Port 3
GPIO Ports Configurations
USB Device Address A
USB Address A, Endpoint 0 counter register
USB Address A, Endpoint 0 configuration register
USB Address A, Endpoint 1 counter register
USB Address A, Endpoint 1 configuration register
USB Address A, Endpoint 2 counter register
USB Address A, Endpoint 2 configuration register
USB upstream port traffic status and control register
Global interrupt enable register
USB endpoint interrupt enables
Lower eight bits of free-running timer (1 MHz)
Upper four bits of free-running timer that are latched
when the lower eight bits are read.
Watch Dog Reset clear
DAC I/O
Interrupt enable for each DAC pin
Interrupt polarity for each DAC pin
One four bit sink current register for each DAC pin
Microprocessor status and control
[2]
Function
CY7C63413C
CY7C63513C
CY7C63613C
Page 9 of 32
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