UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 142

no-image

UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0078GK-9ET-A
Quantity:
57
<R>
CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0
Set Value Before
0
1
7.5.2 Subsystem clock operations
1), the following operations are carried out.
(a) The minimum instruction execution time remains constant (122 s @ 32.768 kHz operation) irrespective of bits
(b) Watchdog timer counting stops.
7.6 Changing System Clock and CPU Clock Settings
7.6.1 Time required for switchover between system clock and CPU clock
of the processor clock control register (PCC).
switchover clock for several instructions (see Table 7-3).
by bit 5 (CLS) of the PCC register.
140
Switchover
When operating with the subsystem clock (with bit 5 (CLS) of the processor clock control register (PCC) set to
Caution
The system clock and CPU clock can be switched over by means of bits 0 to 2 (PCC0 to PCC2) and bit 4 (CSS)
The actual switchover operation is not performed directly after writing to the PCC; operation continues on the pre-
Determination as to whether the system is operating on the main system clock or the subsystem clock is performed
Remark One instruction is the minimum instruction execution time with the pre-switchover CPU clock.
Caution
0
0
0
0
1
0 to 2 (PCC0 to PCC2) of PCC.
0
0
1
1
0
0
1
0
1
0
Do not execute the STOP instruction while the subsystem clock is in operation.
Selection of the CPU clock cycle division ratio (PCC0 to PCC2) and switchover from the main
Simultaneous setting is possible, however, for selection of the CPU clock cycle division ratio
system clock to the subsystem clock (changing CSS from 0 to 1) should not be set simultaneously.
(PCC0 to PCC2) and switchover from the subsystem clock to the main system clock (changing
CSS from 1 to 0).
0
0.5 instructions
4 instructions
2 instructions
1 instruction
1 instruction
0
Table 7-3. Maximum Time Required for CPU Clock Switchover
0
0
0
0.5 instructions
8 instructions
2 instructions
1 instruction
1 instruction
0
CHAPTER 7 CLOCK GENERATOR
0
User’s Manual U14260EJ4V0UD
1
0
0.5 instructions
8 instructions
4 instructions
1 instruction
1 instruction
Set Value After Switchover
0
1
0
0
0.5 instructions
8 instructions
4 instructions
2 instructions
1 instruction
0
1
1
0
8 instructions
4 instructions
2 instructions
1 instruction
1 instruction
1
0
0
f
f
f
f
X
f
X
X
X
1
X
/16f
/2f
/4f
/8f
/f
XT
XT
XT
XT
XT
instructions
instructions
instructions
instructions
instructions

Related parts for UPD78F0078GK-9ET-A