UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 239

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(2) A/D conversion by software start
A/D conversion
Remarks 1. n = 0, 1, ......, 7
When bit 6 (TRG0) and bit 7 (ADCS0) of A/D converter mode register 0 (ADM0) are set to 0 and 1, respectively,
after bit 0 (ADCE0) is set to 1, A/D conversion of the voltage applied to the analog input pin specified by analog
input channel specification register 0 (ADS0) starts.
Upon the end of A/D conversion, the conversion result is stored in A/D conversion result register 0 (ADCR0),
and the interrupt request signal (INTAD0) is generated. After one A/D conversion operation is started and
finished, the next conversion operation is immediately started. A/D conversion operations are repeated until new
data is written to ADS0.
If ADM0 and ADS0 are rewritten during A/D conversion, the converter suspends A/D conversion and A/D
conversion of the selected analog input channel restarts from the beginning.
If 1 is written to ADCS0 again during A/D conversion, the A/D conversion in progress is discontinued and the
A/D conversion is restarted from the beginning.
If 0 is written to ADCS0 during A/D conversion, the A/D conversion operation stops immediately. At this time,
the conversion result is undefined.
INTAD0
ADCR0
2. m = 0, 1, ......, 7
ADM0 set
ADCE0 = 1, ADCS0 = 1, TRG0 = 0
Figure 13-10. A/D Conversion by Software Start
ANIn
CHAPTER 13 A/D CONVERTER
User’s Manual U14260EJ4V0UD
ANIn
ANIn
Conversion suspended;
Conversion results are not stored
ANIn
ANIn
ADS0 rewrite
Undefined
ANIm
ANIm
ADCS0 = 0
ANIm
Stop
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