UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 223

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

12.2 Configuration of Clock Output/Buzzer Output Controller
12.3 Registers to Control Clock Output/Buzzer Output Controller
(1) Clock output select register (CKS)
The clock output/buzzer output controller consists of the following hardware.
The following three registers are used to control the clock output/buzzer output controller.
• Clock output select register (CKS)
• Port mode register (PM7)
• Port register 7 (P7)
This register sets output enable/disable for clock output (PCL) and for the buzzer frequency output (BUZ), and
sets the output clock.
CKS is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CKS to 00H.
Control registers
Table 12-1. Configuration of Clock Output/Buzzer Output Controller
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Item
Clock output select register (CKS)
Port mode register (PM7)
Port register 7 (P7)
User’s Manual U14260EJ4V0UD
Configuration
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