UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 93

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

5.4.7 Based addressing
[Function]
[Operand format]
[Description example]
[Illustration]
8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in
an instruction word of the register bank specified by the register bank select flags (RBS0 and RBS1) and the
sum is used to address the memory. Addition is performed by expanding the offset data as a positive number
to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for all the memory spaces.
MOV A, [HL + 10H]; when setting byte to 10H
HL
The contents of the
addressed memory
is transferred.
A
16
7
Identifier
—
Operation code
[HL + byte]
H
CHAPTER 5 CPU ARCHITECTURE
User’s Manual U14260EJ4V0UD
8 7
0
7
Description
1 0 1 0 1 1 1 0
0 0 0 1 0 0 0 0
Memory
L
0
0
+10
91