ACS8582 Semtech Corporation, ACS8582 Datasheet - Page 24

• Manufacturer Part Number: ACS8582
• Manufacturer: Semtech Corporation

Figure 6 Phase Error Accumulation of T0 PLL Output Port in Holdover Mode
Jitter and Wander Transfer
The ACS8582 has a programmable jitter and wander
transfer characteristic. This is set by the DPLL bandwidth.
The -3 dB jitter transfer attenuation point can be set in the
range from 0.1 Hz to 70 Hz in 10 steps. The wander and
jitter transfer characteristic is shown in
on the local oscillator clock will not have a significant
effect on the output clock whilst in Locked mode, provided
that the DPLL bandwidth is set high enough so that the
DPLL can compensate quickly enough for any frequency
changes in the crystal.
In Free-run or Holdover mode wander on the crystal is
more significant. Variation in crystal temperature or
supply voltage both cause drifts in operating frequency,
as does ageing. These effects must be limited by careful
selection of a suitable component for the local oscillator,
as specified in the section See
Revision 1.00/March 2008 ©Semtech Corp.
ADVANCED COMMS & SENSING
10000000
1000000
100000
10000
1000
100
Local Oscillator
Permitted Phase Error Limit
1000
Figure
Typical measurement, 25°C constant temperature
CONFIDENTIAL
7. Wander
Clock.
FINAL
Page 24
Phase Build-out
Phase Build-out (PBO) is the function to minimize phase
transients on the output SEC clock during input reference
switching. If the currently selected input reference clock
source is lost (due to a short interruption, out of frequency
detection, or complete loss of reference) the second, next
highest priority reference source will be selected, and a
PBO event triggered.
ITU-T G.813 states that the maximum allowable short-
term phase transient response, resulting from a switch
from one clock source to another, with Holdover mode
entered in between, should be a maximum of 1 µs over a
15 second interval. The maximum phase transient or
jump should be less than 120 ns at a rate of change of
less than 7.5 ppm and the Holdover performance should
be better than 0.05 ppm. The ACS8582 performance is
well within this requirement. The typical phase
disturbance on clock reference source switching will be
less than 5 ns on the ACS8582.
When a PBO event is triggered, the device enters a
temporary Holdover state. When in this temporary state,
the phase of the input reference is measured, relative to
the output.
10000
Observation interval (s)
100000
ACS8582
DATASHEET
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