ACS8582 Semtech Corporation, ACS8582 Datasheet - Page 62

• Manufacturer Part Number: ACS8582
• Manufacturer: Semtech Corporation

Address (hex):
Address (hex):
Revision 1.00/March 2008 ©Semtech Corp.
ADVANCED COMMS & SENSING
Register Name
auto_BW_sel
Register Name
Bit No.
Bit No.
Bit 7
[6:4]
[2:0]
Bit 7
[7:0]
7
3
3B
3C
cnfg_auto_bw_sel
Description
auto_BW_sel
Bit to select locked bandwidth (Reg. 67) or
acquisition bandwidth (Reg. 69) for the T0 DPLL.
Not used.
T0_lim_int
When set to 1, the integral path value of the DPLL is
limited or frozen when the DPLL reaches either min.
or max. frequency. This can be used to minimize
subsequent overshoot when the DPLL is pulling in.
Note that when this happens, the reported
frequency value via current_DPLL_freq (Reg. 0C,
Reg. 0D and Reg. 07) is also frozen.
Not used.
cnfg_nominal_frequency
[7:0]
Description
cnfg_nominal_frequency_value[7:0]
Bit 6
Bit 6
Bit 5
Bit 5
cnfg_nominal_frequency_value[7:0]
Description
Description
CONFIDENTIAL
Bit 4
Bit 4
FINAL
Page 62
(R/W) Register to select
automatic bandwidth selection for
the T0 DPLL path
T0_lim_int
(R/W) Bits [7:0] of the register
used to calibrate the crystal
oscillator that clocks the device.
Bit Value
Bit Value
Bit 3
Bit 3
1
0
1
0
-
-
-
Value Description
Automatically selects either locked or acquisition
bandwidth as appropriate.
Always selects locked bandwidth.
-
DPLL value frozen.
DPLL not frozen.
-
Value Description
See register description of Reg. 3D
(cnfg_nominal_frequency_value[15:8]).
Bit 2
Bit 2
Default Value
Default Value
Bit 1
Bit 1
ACS8582
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1111 1101
1001 1001
Bit 0
Bit 0